Method video encoding and decoding preserving cache localities
View Patent ↗The invention relates to a method for encoding/decoding a video stream including a plurality of images (A, B, C) in a video processing apparatus having a processing unit ( 11 ) coupled to a first memory ( 12 ), further comprising a second memory ( 13 ), comprising the steps: providing a subset of image data stored in the second memory ( 13 ) in the first memory ( 12 ), —simultaneous encoding/decoding of more than one image (B, C) of the video stream, by accessing said subset, wherein the simultaneously encoding/decoding is performed by access sharing to at least one image (A). For reducing the traffic or the number of access to second memory ( 13 ) an apparatus is proposed including: a processing unit ( 11 ) for performing an encoding/decoding process of video data; a first memory ( 12 ) coupled to the processing unit ( 11 ) for storing image data required for encoding/decoding of video data, —a second memory ( 13 ), wherein the video stream includes a plurality of images (A, B, C); the first memory ( 11 ) is adapted to store a subset of image data of the second memory ( 13 ) in the first memory ( 12 ) and the processing unit ( 11 ) is adapted to simultaneously encode/decode more than one image (B, C) of the video stream by accessing said subset of image data in the first memory ( 12 ), wherein the simultaneously encoding/decoding is performed by sharing access to at least one image.
1. Method for encoding/decoding a video stream including a plurality of images in a video processing apparatus having a processing unit coupled to a first memory, further comprising a second memory, comprising:
providing a subset of image data stored in the second memory in the first memory;
simultaneous encoding/decoding of more than one image of the video stream, by accessing said subset, wherein the simultaneously encoding/decoding is performed by access sharing to at least one image.
2. Method as claimed in claim 1 , further comprising:
synchronizing the accesses in the first memory for ensuring that the accesses occur at substantially equal image positions in the shared image.
3. Method as claimed in claim 2 , wherein the synchronization is based on a vertical location in the respective images.
4. Method as claimed in claim 3 , wherein synchronization offsets are based on maximum vertical component of the motion vector.
5. Method as claimed in claim 1 , wherein at least one of the simultaneously encoded/decoded images is used as a reference image for encoding/decoding at least one of the other simultaneously encoded/decoded images.
6. Method as claimed in claim 1 , wherein the simultaneously encoded/decoded images share access to a common reference image.
7. Method as claimed in claim 1 , further comprising:
synchronizing the accesses in the first memory for ensuring that the decoding/encoding of the first image of the simultaneously encoded/decoded images is ahead of the reading position of the second image that depends on the first image.
8. Method as claimed in claim 1 for decoding a video stream, further comprising searching of the video stream for finding the beginning of a next image, without having decoded the image yet.
9. Method as claimed in claim 1 for encoding a video stream, wherein the data of simultaneously encoded images are concatenated to produce an image sequential bit stream.
10. A video processing apparatus comprising:
a processing unit for performing an encoding/decoding process of video data;
a first memory coupled to the processing unit for storing image data required for encoding/decoding of video data;
a second memory, wherein the video stream includes a plurality of images; the first memory is adapted to store a subset of image data of the second memory in the first memory and the processing unit is adapted to simultaneously encode/decode more than one image of the video stream by accessing said subset of image data in the first memory, wherein the simultaneously encoding/decoding is performed by sharing access to at least one image.
11. Video processing apparatus as claimed in claim 10 having multiple processing units, each operating at the same time and processing a single image, further comprising a plurality of first memories, each associated to a respective processing unit, wherein a communication unit is provided between the first memories to provide data access to a first memory not directly associated to the processing unit that requires the data.