IP Library Granted Patent US 8,062,984
Granted Patent B2
US 8,062,984 · App. 12/065,722 · Granted Nov 22, 2011

Laser ablation of electronic devices

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,062,984
App. No.
12/065,722
Granted
Nov 22, 2011
Kind
B2
Abstract

A method of fabricating an electronic device, the device including a plurality of layers on a substrate, the layers including an upper conductive layer and at least one patterned underlying layer between said conductive layer and said substrate. The method includes patterning said underlying layer, and patterning said upper conductive layer by laser ablation using a stepwise process in which successive areas of said upper conductive layer are ablated by successively applied laser patterns. The successively applied laser patterns overlap one another in an overlap region. The method further includes configuring a said laser pattern and said patterned underlying layer with respect to one another such that in a said overlap region said patterned underlying layer is substantially undamaged by said stepwise laser ablation.

Claims (33)

1. A method of fabricating an electronic device, the device comprising a plurality of layers on a substrate, the layers including an upper conductive layer and at least one patterned underlying layer between said conductive layer and said substrate, the method comprising:

patterning said underlying layer; and

patterning said upper conductive layer by laser ablation using a stepwise process in which successive areas of said upper conductive layer are ablated by successively applied laser patterns;

wherein said successively applied laser patterns overlap one another in an overlap region; and

wherein said method further comprises configuring a said laser pattern and said patterned underlying layer laterally with respect to one another such that in a said overlap region said patterned underlying layer is substantially undamaged by said stepwise laser ablation.

2. A method as claimed in claim 1 wherein said configuring comprises configuring said pattern of said underlying layer such that material of said underlying layer is substantially absent from a said overlap region.

3. A method as claimed in claim 2 wherein said device comprises a display device, wherein said underlying layer comprises a conductive electrode layer, and wherein said configuring comprises configuring said pattern of said underlying layer to define a plurality of electrode lines each with an adjacent stripe substantially free of conductive material.

4. A method as claimed in claim 1 wherein said configuring comprises configuring at least one of two said overlapping laser patterns to leave said upper conductive layer substantially unablated in parts of said overlap region beneath which material of said patterned underlying layer is present.

5. A method as claimed in claim 4 wherein said two overlapping patterns comprise different patterns each defined by a respective sub-field mask.

6. A method as claimed in claim 1 wherein said stepwise laser ablation process comprises repeatedly applying substantially the same laser pattern.

7. A method as claimed in claim 1 further comprising adjusting positions of said successively applied laser patterns or said substrate to compensate for distortion of said substrate.

8. A method as claimed in claim 1 wherein said underlying layer comprises a conductive layer, and wherein said device further comprises a dielectric layer between said upper conductive layer and said underlying layer.

9. A method as claimed in claim 8 wherein said device comprises a thin film transistor (TFT) and wherein one of said underlying layer and said upper conductive layer comprises a source-drain layer of said TFT and the other of said underlying layer and said upper conductive layer comprises a gate layer of said TFT.

10. A method as claimed in claim 1 wherein said device comprises a molecular electronic device.

11. A method as claimed in claim 1 wherein said substrate comprises a flexible substrate.

12. A method as claimed in claim 1 wherein said fabricating comprises fabricating said upper conductive layer over a layer to which said upper conductive layer is adhered, and wherein said ablation operates by a mechanism which includes delamination.

13. A method as claimed in claim 1 wherein said upper conductive layer has an optical density at a wavelength of said laser ablation of at least 0.5.

14. A method as claimed in claim 1 wherein, in the regions of the substrate that are not part of the overlap region, said laser ablation selectively removes substantially only said upper conductive layer from the substrate.

15. A method as claimed in claim 1 wherein said laser ablation comprises single-shot laser ablation.

16. A method as claimed in claim 1 wherein said device is an active matrix display.

17. A method of fabricating a thin film transistor (TFT) active matrix display, sensing device or logic circuit employing the method of claim 1 .

18. A method of fabricating an electronic device, the device comprising a plurality of layers on a substrate, the layers including an upper conductive layer and at least one patterned underlying layer between said conductive layer and said substrate, the method comprising:

patterning said underlying layer; and

patterning said upper conductive layer by laser ablation using a stepwise process in which successive areas of said upper conductive layer are ablated by successively applied laser patterns;

wherein said successively applied laser patterns overlap one another in an overlap region;

wherein said method further comprises configuring a said laser pattern and said patterned underlying layer with respect to one another such that in a said overlap region said patterned underlying layer is substantially undamaged by said stepwise laser ablation; and

wherein said configuring comprises configuring said pattern of said underlying layer such that material of said underlying layer is substantially absent from a said overlap region.

19. A method of fabricating an electronic device, the device comprising a plurality of layers on a substrate, the layers including an upper conductive layer and at least one patterned underlying layer between said conductive layer and said substrate, the method comprising:

patterning said underlying layer; and

patterning said upper conductive layer by laser ablation using a stepwise process in which successive areas of said upper conductive layer are ablated by successively applied laser patterns;

wherein said successively applied laser patterns overlap one another in an overlap region;

wherein said method further comprises configuring a said laser pattern and said patterned underlying layer with respect to one another such that in a said overlap region said patterned underlying layer is substantially undamaged by said stepwise laser ablation; and

wherein said configuring comprises configuring at least one of two said overlapping laser patterns to leave said upper conductive layer substantially unablated in parts of said overlap region beneath which material of said patterned underlying layer is present.

Assignments (4)
CHANGE OF NAME Recorded Jul 23, 2015
From: PLASTIC LOGIC LIMITED
To: FLEXENABLE LIMITED
Reel/Frame 036176/0105 →
RELEASE OF SECURITY INTEREST Recorded May 12, 2011
From: STATE CORPORATION "RUSSIAN CORPORATION OF NANOTECHNOLOGIES"
To: PLASTIC LOGIC LIMITED
Reel/Frame 026271/0377 →
SECURITY AGREEMENT Recorded Aug 3, 2010
From: PLASTIC LOGIC LIMITED
To: STATE CORPORATION "RUSSIAN CORPORATION OF NANOTECHNOLOGIES"
Reel/Frame 024776/0357 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2009
From: CAIN, PAUL A.; HAYTON, CARL
To: PLASTIC LOGIC LIMITED
Reel/Frame 023250/0868 →