Processes for forming isolation structures for integrated circuit devices
View Patent ↗Processes for forming isolation structures for semiconductor devices include forming a submerged floor isolation region and a filed trench which together enclose an isolated pocket of the substrate. One process aligns the trench to the floor isolation region. In another process a second, narrower trench is formed in the isolated pocket and filled with a dielectric material while the dielectric material is deposited so as to line the walls and floor of the first trench. The substrate does not contain an epitaxial layer, thereby overcoming the many problems associated with fabricating the same.
1. A process for forming an isolation structure for an integrated circuit device comprising:
providing a semiconductor substrate of a first conductivity type, the substrate not containing an epitaxial layer;
forming a first mask layer above a top surface of the substrate;
patterning the first mask layer to form a first opening in the first mask layer;
implanting a dopant of a second conductivity type through the opening in the first mask layer and the top surface of the substrate so as to form a floor isolation region, the floor isolation region having an upper boundary below the top surface of the substrate immediately following said implanting;
forming a second mask layer above the top surface of the substrate within the opening in the first mask layer, an edge of the second mask layer being separated from an edge of the first opening in the first mask layer to create a gap;
etching the substrate through the gap to form a trench, the trench extending downward at least to the floor isolation region; and
filling the trench so as to form an isolated pocket of the substrate.
2. The process of claim 1 comprising forming a third mask layer in the opening in the first mask layer prior to forming the second mask layer and etching the third mask layer through the gap.
3. The process of claim 1 comprising forming a third mask layer above the top surface of the substrate, the third mask layer having an opening above the isolated pocket, and implanting a dopant of the first conductivity type into the isolated pocket through the opening the third mask layer.
4. The process of claim 3 wherein the opening in the third mask layer has an edge located above the trench.
5. The process of claim 1 wherein filling the trench comprises depositing a dielectric material to completely fill the trench.
6. The process of claim 1 wherein filling the trench comprises depositing a dielectric material to coat the sidewalls of the trench and depositing a conductive material to completely fill the trench.
7. The process of claim 1 further comprising planarizing the top surface of the substrate after filling the trench.