Semiconductor device and method for fabricating the same
View Patent ↗A semiconductor device, comprising a substrate, a semiconductive layer and a gate electrode is provided. The semiconductive layer having a crystallization promoting material is formed over the substrate. The semiconductive layer has a channel region, a first doped region and a second doped region. The first doped region has a donor and an acceptor, and the second doped region has a dopant which is selected from one of the donor and the acceptor. The second doped region is disposed between the first doped region and the channel region. The gate electrode is insulated from the channel region.
1. A semiconductor device, comprising:
a substrate;
a semiconductive layer having a crystallization promoting material formed over the substrate, the semiconductive layer having:
a channel region;
a first doped region having a donor and an acceptor; and
a second doped region having a dopant which is selected from one of the donor and the acceptor, wherein the second doped region is disposed between the first doped region and the channel region;
a stopper layer, formed on the semiconductive layer, corresponding to the channel region, and covered by a part of the first doped region; and
a gate electrode insulated from the channel region.
2. The semiconductor device according to claim 1 , wherein if the semiconductor device is a N type transistor, the dopant of the second doped region is the donor, and a concentration of the donor in the first doped region is higher than a concentration of the acceptor in the first doped region.
3. The semiconductor device according to claim 1 , wherein if the semiconductor device is a P type transistor, the dopant of the second doped region is the acceptor, and the concentration of the donor in the first doped region is lower than the concentration of the acceptor in the first doped region.
4. The semiconductor device according to claim 1 , wherein the acceptor comprises at least one element selected froth IIIA group elements.
5. The semiconductor device according to claim 1 , wherein the donor comprises at least one element selected from VA group elements.
6. The semiconductor device according to claim 1 , wherein the gate electrode is formed under the semiconductive layer and corresponds to the channel region, the semiconductor device comprises a gate insulating layer, formed between the gate electrode and the semiconductive layer for covering the gate electrode.
7. The semiconductor device according to claim 6 , wherein the first doped region is formed on the second doped region.
8. The semiconductor device according to claim 1 , wherein the second doped region further having both of the accepter and the donor;
wherein a concentration of the acceptor in the second doped region is lower than a concentration of the acceptor in the first region when the semiconductor device is a N type transistor, in which a concentration of the donor in the first doped region is higher than a concentration of the acceptor in the first doped region;
wherein a concentration of the donor in the second region is lower than a concentration of the donor in the first region when the semiconductor device is a P type transistor, in which a concentration of the donor in the first doped region is lower than the concentration of the acceptor in the first doped region.