Display apparatus, display-apparatus driving method and electronic equipment

1 . A display apparatus comprising:

a pixel array section including pixel circuits laid out to form a matrix as pixel circuits each having

an electro-optical device,

a write transistor configured to carry out a voltage storing process to sample a video signal and store said sampled video signal into said pixel circuit,

a holding capacitor configured to hold said sampled video signal stored in said pixel circuit by said write transistor, and

a driving transistor configured to drive said electro-optical device on the basis of said video signal held by said holding capacitor;

first scan means connected to rows of said pixel circuits in said pixel array section for carrying out a selective scan operation on said pixel circuits in said pixel array section in row units and driving each of said write transistors to carry out said voltage storing process;

second scan means connected to said rows of said pixel circuits in said pixel array section for selectively supplying either a first electric potential or a second electric potential lower than said first electric potential synchronously with said selective scan operation carried out by said first scan means to power-supply feed lines for feeding a current to each of said driving transistors; and

control means for sustaining said power-supply feed line in a floating state during a period ending at a time not earlier than the start of said voltage storing process carried out by said write transistor to store said video signal in said holding capacitor after a voltage corresponding to the threshold voltage of said driving transistor has been held in said holding capacitor prior to said voltage storing process.

2 . The display apparatus according to claim 1 wherein said control means electrically disconnects a power-supply line for providing said first electric potential and a power-supply line for providing said second electric potential from said power-supply feed line.

3 . The display apparatus according to claim 2 wherein said control means is a switch device connected between the output terminal of said second scan means and said power-supply feed line.

4 . The display apparatus according to claim 2 wherein:

said second scan means has a last-stage buffer including a first P-channel transistor, a first N-channel transistor, a second P-channel transistor and a second N-channel transistor,

the source of said first P-channel transistor connecting to said power-supply line for providing said first electric potential,

the source of said first N-channel transistor connecting to said power-supply line for providing said second electric potential,

the drain of said first P-channel transistor connecting to the source of said second P-channel transistor,

the drain of said second P-channel transistor connecting to the drain of said second N-channel transistor,

the gate of said first P-channel transistor connecting to the gate of said first N-channel transistor, and

the source of said second N-channel transistor connecting to the drain of said first N-channel transistor; and

said second N-channel transistor and said second P-channel transistor function as said control means.

5 . The display apparatus according to claim 2 wherein:

said second scan means has a last-stage buffer including a P-channel transistor and an N-channel transistor,

the source of said P-channel transistor connecting to said power-supply line for providing said first electric potential,

the source of said N-channel transistor connecting to said power-supply line for said second electric potential,

the drain of said P-channel transistor connecting to the drain of said N-channel transistor, and

the gate of said P-channel transistor receiving scan pulses having a phase different from the phase of scan pulses received by the gate of said N-channel transistor; and

said P-channel transistor and said N-channel transistor function as said control means.

6 . A driving method adopted by a display apparatus comprising:

a pixel array section including pixel circuits laid out to form a matrix as pixel circuits each having

an electro-optical device,

a write transistor configured to carry out a voltage storing process to sample an input signal voltage and store said sampled input signal voltage into said pixel circuit,

a holding capacitor configured to hold said sampled input signal voltage stored in said pixel circuit by said write transistor, and

a driving transistor configured to drive said electro-optical device on the basis of said input signal voltage held by said holding capacitor;

first scan means connected to rows of said pixel circuits in said pixel array section for carrying out a selective scan operation on said pixel circuits in said pixel array section in row units and driving each of said write transistors to carry out said voltage storing process; and

second scan means connected to said rows of said pixel circuits in said pixel array section for selectively supplying either a first electric potential or a second electric potential lower than said first electric potential synchronously with said selective scan operation carried out by said first scan means to power-supply feed lines for feeding a current to each of said driving transistors,

whereby said power-supply feed line is sustained in a floating state during a period ending at a time not earlier than the start of said voltage storing process carried out by said write transistor to store said input signal voltage in said holding capacitor after a voltage corresponding to the threshold voltage of said driving transistor has been held in said holding capacitor prior to said voltage storing process.

7 . An electronic equipment including a display apparatus, said display apparatus comprising:

a pixel array section including pixel circuits laid out to form a matrix as pixel circuits each having

an electro-optical device,

a write transistor configured to carry out a voltage storing process to sample an input signal voltage and store said sampled input signal voltage into said pixel circuit,

a holding capacitor configured to hold said sampled input signal voltage stored in said pixel circuit by said write transistor, and

a driving transistor configured to drive said electro-optical device on the basis of said input signal voltage held by said holding capacitor;

first scan means connected to rows of said pixel circuits in said pixel array section for carrying out a selective scan operation on said pixel circuits in said pixel array section in row units and driving each of said write transistors to carry out said voltage storing process;

second scan means connected to said rows of said pixel circuits in said pixel array section for selectively supplying either a first electric potential or a second electric potential lower than said first electric potential synchronously with said selective scan operation carried out by said first scan means to power-supply feed lines for feeding a current to each of said driving transistors; and

control means for sustaining said power-supply feed line in a floating state during a period ending at a time not earlier than the start of said voltage storing process carried out by said write transistor to store said input signal voltage in said holding capacitor after a voltage corresponding to the threshold voltage of said driving transistor has been held in said holding capacitor prior to said voltage storing process.

8 . A display apparatus comprising:

a pixel array section including pixel circuits laid out to form a matrix as pixel circuits each having

an electro-optical device,

a write transistor configured to carry out a voltage storing process to sample a video signal and store said sampled video signal into said pixel circuit,

a holding capacitor configured to hold said sampled video signal stored in said pixel circuit by said write transistor, and

a driving transistor configured to drive said electro-optical device on the basis of said video signal held by said holding capacitor;

a first scan section connected to rows of said pixel circuits in said pixel array section and configured carry out a selective scan operation on said pixel circuits in said pixel array section in row units and drive each of said write transistors to carry out said voltage storing process;

a second scan section connected to said rows of said pixel circuits in said pixel array section and configured to selectively supply either a first electric potential or a second electric potential lower than said first electric potential synchronously with said selective scan operation carried out by said first scan section to power-supply feed lines for feeding a current to each of said driving transistors; and

a control section configured to sustain said power-supply feed line in a floating state during a period ending at a time not earlier than the start of said voltage storing process carried out by said write transistor to store said video signal in said holding capacitor after a voltage corresponding to the threshold voltage of said driving transistor has been held in said holding capacitor prior to said voltage storing process.