IP Library Granted Patent US 8,093,635
Granted Patent B2
US 8,093,635 · App. 12/076,792 · Granted Jan 10, 2012

Solid-state imaging element

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Quick Facts
Patent No.
US 8,093,635
App. No.
12/076,792
Granted
Jan 10, 2012
Kind
B2
Abstract

There is provided a solid-state imaging element having a light receiving part generating charges by light irradiation, and a source/drain region of a transistor, both formed in a semiconductor layer. The solid-state imaging element includes a non-silicided region including the light receiving part, in which surfaces of the source/drain region and a gate electrode of the transistor are not silicided; and a silicided region in which the surfaces of the source/drain region and the gate electrode of the transistor are silicided. The non-silicided region has a sidewall formed on a side surface of the gate electrode of the transistor, a hydrogen supply film formed to cover the semiconductor layer, the gate electrode, and the sidewall, and a salicide block film formed on the hydrogen supply film to prevent silicidation. The silicided region has a sidewall formed on the side surface of the gate electrode of the transistor.

Claims (16)

1. A solid-state imaging element including a semiconductor layer having a light receiving part generating charges by light irradiation, the solid-state imaging element comprising:

a non-silicided region including the light receiving part, in which surfaces of a source/drain region and a gate electrode of a non-silicided transistor are not silicided; and

a silicided region in which the surfaces of a source/drain region and a gate electrode of a silicided transistor are silicided, wherein

the non-silicided region having:

a sidewall formed on a side surface of the gate electrode of the non-silicided transistor;

a hydrogen supply film formed to cover the semiconductor layer, the gate electrode, and the sidewall of the non-silicided transistor; and

a salicide block film formed on the hydrogen supply film to prevent silicidation of the non-silicided transistor, and

the silicided region having:

a sidewall formed on a side surface of the gate electrode of the silicided transistor without the salicide block film covering the semiconductor layer, the gate electrode, and the sidewall of the silicided transistor,

wherein the sidewall in the silicided transistor has a structure identical to the sidewall in the non-silicided transistor,

wherein the sidewall in the non-silicided transistor and silicided transistor is formed of a silicon oxide film and a silicon nitride film,

wherein the silicon oxide film is an HTO (High Temperature Oxide) film and the silicon nitride film is an SiN film formed by low pressure CVD.

2. A solid-state imaging element according to claim 1 , wherein said hydrogen supply film is a UV-SiN film.

3. A solid-state imaging element according to claim 1 , wherein said salicide block film is a silicon oxide layer.

4. A solid-state imaging element according to claim 1 , wherein said salicide block film is a silicon nitride layer.

5. A solid-state imaging element according to claim 4 , wherein said silicon nitride layer is an LP-SiN layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2016
From: SONY CORPORATION
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 040419/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 24, 2008
From: KIDO, HIDEO; ITONAGA, KAZUICHIRO; YOSHITSUGU, KAI; CHIBA, KENICHI
To: SONY CORPORATION
Reel/Frame 020735/0467 →