IP Library Granted Patent US 7,800,351
Granted Patent B2
US 7,800,351 · App. 12/079,257 · Granted Sep 21, 2010

High efficiency voltage regulator with auto power-save mode

Assignee: Active-Semi, Inc.
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Quick Facts
Patent No.
US 7,800,351
App. No.
12/079,257
Granted
Sep 21, 2010
Kind
B2
Abstract

A DC-to-DC converter comprises an error amplifier, a comparator, a PWM controller, a power switch unit, and a control signal monitoring circuit. The PWM controller receives a comparison signal from the comparator and generates a digital control signal that controls the power switch unit such that the DC-to-DC converter supplies a regulated voltage onto a load. The control signal monitoring circuit monitors the digital control signal and detects either a heavy load or a light load condition based on characteristics of the digital control signal. Under the light load condition, the monitoring circuit generates a first enabling signal such that the DC-to-DC controller operates in a power-save mode. Under the heavy load condition, the monitoring circuit generates a second enabling signal such that the DC-to-DC controller operates in a normal operation mode. The DC-to-DC converter consumes substantially less power in the power-save mode than in the normal operation mode.

Claims (36)

1. A DC-to-DC converter, comprising:

a power switch unit;

an amplifier that compares a feedback voltage to a reference voltage and outputs an error signal;

a comparator that compares the error signal to a ramp signal and outputs a comparison signal;

a PWM controller that receives the comparison signal and outputs a digital control signal, wherein the digital control signal is used to control the power switch unit such that the DC-to-DC converter supplies a regulated voltage onto a load; and

a control signal monitoring circuit that monitors the digital control signal, wherein the control signal monitoring circuit detects a light load condition and in response outputs a first enabling signal such that the DC-to-DC converter operates in a power-save mode.

2. The DC-to-DC converter of claim 1 , wherein the control signal monitoring circuit detects a heavy load condition and in response outputs a second enabling signal such that the DC-to-DC converter operates in a normal operation mode.

3. The DC-to-DC converter of claim 2 , wherein the DC-to-DC converter consumes less power in the power-save mode than in the normal operation mode.

4. The DC-to-DC converter of claim 2 , wherein the comparator has a substantially smaller power consumption in the power-save mode than in the normal operation mode.

5. The DC-to-DC converter of claim 2 , wherein the power switch unit comprises a switch and a current amplifier, and wherein the current amplifier has a substantially smaller power consumption in the power save mode than in the normal operation mode.

6. The DC-to-DC converter of claim 1 , wherein the control signal monitoring circuit comprises:

a timer that monitors the digital control signal and outputs a digital value when the digital control signal remains unchanged for a predetermined time period; and

a sequential logic element that outputs the first enabling signal in response to the digital value.

7. The DC-to-DC converter of claim 6 , wherein the sequential logic element outputs the second enabling signal when the digital control signal changes from a digital low to a digital high.

8. The DC-to-DC converter of claim 6 , wherein the sequential logic element is taken from the group consisting of: a flip-flop circuit, and an SR latch circuit.

9. The DC-to-DC converter of claim 1 , wherein the DC-to-DC converter further comprises a synchronous rectifier.

10. A method, comprising:

(a) monitoring a digital control signal generated by a PWM controller of a DC-to-DC converter, wherein the DC-to-DC converter supplies a regulated voltage onto a load;

(b) detecting that the DC-to-DC converter is operating in a light load condition based on characteristics of the digital control signal; and

(c) in response to the detecting in (b), outputting a first enabling signal such that the DC-to-DC converter operates in a power-save mode.

11. The method of claim 10 , wherein the light load condition is detected in (b) by determining that the digital control signal remains unchanged for a predetermined time period.

12. The method of claim 10 , further comprising:

(d) detecting that the DC-to-DC converter is operating in a heavy load condition based on the characteristics of the digital control signal; and

(e) in response to the detecting in (d), outputting a second enabling signal such that the DC-to-DC converter operates in a normal operation mode.

13. The method of claim 12 , wherein the heavy load condition is detected in (d) by determining that the digital control signal changes from a digital low to a digital high.

14. The method of claim 12 , wherein the DC-to-DC converter consumes less power in the power-save mode than in the normal operation mode.

15. The method of claim 12 , wherein the DC-to-DC converter comprises a synchronous rectifier.

16. A DC-to-DC converter comprising:

a power switch unit;

a controller that outputs a digital control signal such that the power switch unit supplies a regulated voltage onto a load; and

means for monitoring the digital control signal, wherein the means detects a light load condition based on characteristics of the digital control signal and in response outputs a first enabling signal such that the DC-to-DC converter operates in a power-save mode.

17. The DC-to-DC converter of claim 16 , wherein the light load condition is detected by determining that the digital control signal remains unchanged for a predetermined time period.

18. The DC-to-DC converter of claim 15 , wherein the means also detects a heavy load condition based on the characteristics of the digital control signal and in response outputs a second enabling signal such that the DC-to-DC converter operates in a normal operation mode.

19. The DC-to-DC converter of claim 18 , wherein the heavy load condition is detected by determining that the digital control signal changes from a digital low to a digital high.

20. The DC-to-DC converter of claim 18 , wherein the DC-to-DC converter consumes less power in the power-save mode than in the normal operation mode.

21. The DC-to-DC converter of claim 16 , wherein the DC-to-DC converter comprises a synchronous rectifier.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 11, 2025
From: ACTIVE-SEMI (BVI), INC.
To: QORVO INTERNATIONAL PTE. LTD.
Reel/Frame 070478/0096 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED AT REEL: 24904 FRAME: 196. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jan 23, 2025
From: ACTIVE-SEMI INTERNATIONAL, INC.
To: ACTIVE-SEMI (BVI), INC.
Reel/Frame 070002/0957 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 16, 2010
From: ACTIVE-SEMI INTERNATIONAL, INC.
To: ACTIVE-SEMI, INC.
Reel/Frame 024904/0196 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 1, 2009
From: ACTIVE-SEMI INTERNATIONAL, INC.
To: ACTIVE-SEMI, INC.
Reel/Frame 022768/0069 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 24, 2008
From: GAN, GE
To: ACTIVE-SEMI INTERNATIONAL, INC.
Reel/Frame 020749/0394 →
Continuity (1)
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