IP Library Granted Patent US 7,968,800
Granted Patent B2
US 7,968,800 · App. 12/089,124 · Granted Jun 28, 2011

Passive component incorporating interposer

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Quick Facts
Patent No.
US 7,968,800
App. No.
12/089,124
Granted
Jun 28, 2011
Kind
B2
Abstract

A passive component incorporating interposer includes a double-sided circuit board ( 1 ) having a wiring layer ( 8 ) on both sides, a passive component ( 2 ) mounted on the wiring layer ( 8 ) on one surface of the double-sided circuit board ( 1 ), a second insulating layer ( 3 ) made of woven fabric or non-woven fabric or inorganic filler and thermosetting resin laminated on the surface of the double-sided circuit board ( 1 ) mounted with the passive component ( 2 ), a first insulating layer ( 4 ) made of woven fabric or non-woven fabric or inorganic filler and thermosetting resin laminated on the other surface of the double-sided circuit board ( 1 ) not mounted with the passive component ( 2 ), first and second wiring layers ( 5, 6 ) formed on the first and second insulating layers ( 3, 4 ), and a through hole ( 7 ) for electrically connecting the wiring layers ( 8 ) disposed on both surfaces of the double-sided circuit board ( 1 ) and the first and second wiring layers ( 5, 6 ), where the first wiring layer ( 5 ) is formed to enable mounting of a semiconductor element ( 9 ).

Claims (22)

1. A passive component incorporating interposer comprising:

a resin substrate having wiring layers on both surfaces;

one or more passive components mounted on the wiring layer on one surface of the resin substrate;

a first insulating layer made of woven fabric or non-woven fabric and thermosetting resin laminated on the other surface of the resin substrate not mounted with the passive component;

a second insulating layer made of woven fabric or non-woven fabric and thermosetting resin laminated on the surface of the resin substrate mounted with the passive component and formed with a space larger than an outside dimension of the passive component;

a first wiring layer formed on a surface of the first insulating layer not contacting the resin substrate;

a second wiring layer formed on a surface of the second insulating layer not contacting the resin substrate; and

a through hole for electrically connecting the wiring layers disposed on both sides of the resin substrate, the first wiring layer, and the second wiring layer; wherein

the first wiring layer is formed to enable mounting of a semiconductor element.

2. A passive component incorporating interposer comprising:

a resin substrate having wiring layers on both surfaces;

one or more passive components mounted on the wiring layer on one surface of the resin substrate;

a first insulating layer made of inorganic filler and thermosetting resin laminated on the other surface of the resin substrate not mounted with the passive component;

a second insulating layer made of inorganic filler and thermosetting resin laminated on the surface of the resin substrate mounted with the passive component;

a first wiring layer formed on a surface of the first insulating layer not contacting the resin substrate;

a second wiring layer formed on a surface of the second insulating layer not contacting the resin substrate; and

a through hole for electrically connecting wiring layers disposed on both surfaces of the resin substrate, the first wiring layer, and the second wiring layer; wherein

the first wiring layer is formed to enable mounting of a semiconductor element.

3. The passive component incorporating interposer according to claim 1 , wherein the passive component is at least a chip capacitor.

4. The passive component incorporating interposer according to claim 1 , wherein the passive component is a chip capacitor and a chip resistor.

5. The passive component incorporating interposer according to claim 2 , wherein the passive component is at least a chip capacitor.

6. The passive component incorporating interposer according to claim 2 , wherein the passive component is a chip capacitor and a chip resistor.

Assignments (2)
CHANGE OF NAME Recorded Nov 11, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021818/0725 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2008
From: SASAOKA, TATSUO; SUGAYA, YASUHIRO; KAWAMOTO, EIJI; HONJO, KAZUHIKO; ASAHI, TOSHIYUKI; SASAKI, CHIE; SUZUKI, HIROAKI
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 021151/0410 →