Vertical transitions, printed circuit boards therewith and semiconductor packages with the printed circuit boards and semiconductor chip
View Patent ↗Provided are vertical transitions which have the high electrical performance and the high shielding properties in the wide frequency band in a multilayer PCB, printed circuit boards with the vertical transitions and semiconductor packages with the printed circuit boards and semiconductor chips. In vertical transitions for a multilayer PCB, a wave guiding channel is a conductor which includes at least more than one of signal vias 201 , an assembly of ground vias 202 surrounding the signal via, ground plates from conductor layers of the PCB connected to the ground vias, closed ground striplines 205 connecting the ground vias and power supply layer.
1. A vertical transition which comprises at least one signal via and a plurality of ground vias around said at least one signal via, said vertical transition comprising:
a plurality of conductor layers;
a plurality of isolating layers between said conductor layers; and
a plurality of closed striplines connected to said ground vias, wherein:
at least one conductor layer is separated from said closed stripline by an isolating slot.
2. The vertical transition according to claim 1 , wherein:
at least one conductor layer which is separated from said closed stripline is a power supply layer.
3. The vertical transition according to claim 1 , wherein:
at least one conductor layer which is separated from said closed stripline is a ground layer.
4. The vertical transition according to claim 1 , wherein:
at least one conductor layer which is separated from said closed stripline is a signal layer.
5. The vertical transition according to claim 1 , wherein:
at least two conductor layers which are separated from said closed striplines are a power supply layer and a ground layer.
6. The vertical transition according to claim 1 , wherein:
at least two conductor layers which are separated from said closed striplines are a power supply layer and a signal layer.
7. The vertical transition according to claim 1 , wherein:
at least two conductor layers which are separated from said closed striplines are a ground layer and a signal layer.
8. The vertical transition according to claim 1 , wherein:
at least three conductor layers which are separated from said closed striplines are a power supply layer, a ground layer and a signal layer.
9. The vertical transition according to claim 1 , further comprising:
a clearance hole separating said signal via from said plurality of ground vias, wherein:
said clearance is filled by an isolating material with constitutive parameters (relative permittivity and permeability) which are different from constitutive parameters of a PCB isolating material.
10. A printed circuit board including a vertical transition which comprises at least one signal via and a plurality of ground vias around said at least one signal via, said vertical transition comprising:
a plurality of conductor layers;
a plurality of isolating layers between said conductor layers; and
a plurality of closed striplines connected to said ground vias, wherein:
at least one conductor layer is separated from said closed stripline by an isolating slot.
11. The printed circuit board according to claim 10 , wherein:
at least one conductor layer which is separated from said closed stripline is a power supply layer.
12. The printed circuit board according to claim 10 , wherein:
at least one conductor layer which is separated from said closed stripline is a ground layer.
13. The printed circuit board according to claim 10 , wherein:
at least one conductor layer which is separated from said closed stripline is a signal layer.
14. The printed circuit board according to claim 10 , wherein:
at least two conductor layers which are separated from said closed strip line are a power supply layer and a ground layer.
15. The printed circuit board according to claim 10 , wherein:
at least two conductor layers which are separated from said closed stripline are a power supply layer and a signal layer.
16. The printed circuit board according to claim 10 , wherein:
at least two conductor layers which are separated from said closed striplines are a ground layer and a signal layer.
17. The printed circuit board according to claim 10 , wherein:
at least three conductor layers which are separated from said closed striplines are a power supply layer, a ground layer and a signal layer.
18. The printed circuit board according to claim 10 , further comprising:
a clearance hole separating said signal via from said plurality of ground vias, wherein:
said clearance is filled by an isolating material with constitutive parameters (relative permittivity and permeability) which are different from constitutive parameters of a PCB isolating material.
19. A semiconductor package comprising:
a printed circuit board; and
a semiconductor chip, wherein:
said printed circuit board including a vertical transition which comprises at least one signal via and a plurality of ground vias around said at least one signal via, said vertical transition comprising:
a plurality of conductor layers;
a plurality of isolating layers between said conductor layers; and
a plurality of closed striplines connected to said ground vias; wherein:
at least one conductor layer is separated from said closed stripline by an isolating slot, and wherein:
said semiconductor chip connecting a signal terminal to said signal via of said printed circuit board and connecting a ground terminal to said ground vias of said printed circuit board.
20. The semiconductor package according to claim 19 , wherein:
at least one conductor layer which is separated from said closed stripline is a power supply layer.
21. The semiconductor package according to claim 19 , wherein:
at least one conductor layer which is separated from said closed stripline is a ground layer.
22. The semiconductor package according to claim 19 , wherein:
at least one conductor layer which is separated from said closed stripline is a signal layer.
23. The semiconductor package according to claim 19 , wherein:
at least two conductor layers which are separated from said closed striplines are a power supply layer and a ground layer.
24. The semiconductor package according to claim 19 , wherein:
at least two conductor layers which are separated from said closed striplines are a power supply layer and a signal layer.
25. The semiconductor package according to claim 19 , wherein:
at least two conductor layers which are separated from said closed striplines are a ground layer and a signal layer.
26. The semiconductor package according to claim 19 , wherein:
at least three conductor layers which are separated from said closed striplines are a power supply layer, a ground layer and a signal layer.
27. The semiconductor package according to claim 19 , further comprising:
a clearance hole separating said signal via from said plurality of ground vias, wherein:
said clearance is filled by an isolating material with constitutive parameters (relative permittivity and permeability) which are different from constitutive parameters of a PCB isolating material.