IP Library Granted Patent US 8,085,524
Granted Patent B2
US 8,085,524 · App. 12/092,608 · Granted Dec 27, 2011

Integrated capacitor arrangement for ultrahigh capacitance values

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,085,524
App. No.
12/092,608
Granted
Dec 27, 2011
Kind
B2
Abstract

An electronic device includes at least one trench capacitor that can also take the form of an inverse structure, a pillar capacitor. An alternating layer sequence of at least two dielectric layers and at least two electrically conductive layers is provided in the trench capacitor or on the pillar capacitor, such that the at least two electrically conductive layers are electrically isolated from each other and from the substrate by respective ones of the at least two dielectric layers. A set of internal contact pads is provided, and each internal contact pad is connected with a respective one of the electrically conductive layers or with the substrate. A range of switching opportunities is opened up that allows tuning the specific capacitance of the capacitor to a desired value.

Claims (19)

1. An electronic device comprising, on a first side of a substrate, at least one trench capacitor in the substrate, the trench capacitor including:

an alternating layer sequence including at least two dielectric layers and at least two electrically conductive layers, such that the at least two electrically conductive layers are electrically isolated from each other and from the substrate by respective ones of the at least two dielectric layers, and

a set of internal contact pads on the first substrate side, wherein each internal contact pad is connected with a respective one of the electrically conductive layers or with the substrate.

2. The electronic device of claim 1 , comprising a plurality of trench capacitors, wherein a respective set of internal contact pads is provided with each trench capacitor of the plurality of trench capacitors.

3. The electronic device of claim 2 , wherein the plurality of capacitors constitute a distributed capacitor structure that has a first capacitor electrode, which is formed by a first number of corresponding electrically conductive layers, at least one conductive layer from each trench capacitor of the distributed capacitor structure, the conductive layers being connected by interconnects between their respective internal contact pads.

4. The electronic device of claim 3 , wherein the distributed capacitor structure has at least one second capacitor electrode, which is formed by a second number of corresponding electrically conductive layers, at least one conductive layer from each trench capacitor of the distributed capacitor structure, the second number of conductive layers being connected by interconnects between their respective internal contact pads.

5. The electronic device of claim 4 , wherein at least one first conductive layer forms a first capacitor electrode and at least one second conductive layer forms a second capacitor electrode, wherein the first capacitor electrode is connected with an internal substrate contact pad, and wherein the second capacitor electrode is floating.

6. The electronic device of claim 2 , which is configured to have a capacitance density of at least 100 nF/mm 2 and a breakdown voltage of typically between 10 and 70 V.

7. The electronic device of claim 3 , wherein a switching element is interconnected between two internal contact pads of different sets of internal contact pads associated with different trench capacitors, the switching element being configured, in a first switching state, to electrically connect the two internal contact pads with each other and, in a second switching state, to electrically disconnect two the internal contact pads from each other, the switching element having a control input port and being further configured to be in either the first or the second switching state, depending on which of two predefined control signals is applied to the control input port.

8. The electronic device of claim 1 , wherein the alternating layer sequence comprises two dielectric layers, two conductive layers and, in addition, either a third conductive layer or the substrate of the trench capacitor in a MIMIM configuration.

9. The electronic device of claim 1 , wherein the at least two dielectric layers differ in a ratio between the respective layer thickness and a respective dielectric constant that is specific for a given material of a respective dielectric layer.

10. The electronic device of claim 9 , wherein thickness values of the dielectric layers included in the alternating layer sequence are different from each other.

11. The electronic device of claim 9 , wherein dielectric constants of the dielectric layers included in the alternating layer sequence are different from each other.

12. The electronic device of claim 1 , wherein the alternating layer sequence comprises at least three dielectric layers and at least three electrically conductive layers, such that the at least three electrically conductive layers are electrically isolated from each other and from the substrate by respective ones of the at least three dielectric layers.

13. The electronic device of claim 1 , wherein a switching element is interconnected between two internal contact pads of one set of internal contact pads associated with one trench capacitor, the switching element being configured, in a first switching state, to electrically connect the two internal contact pads with each other and, in a second switching state, to electrically disconnect the two internal contact pads from each other, the switching element having a control input port and being further configured to be in either the first or the second switching state, depending on which of two predefined control signals is applied to the control input port.

14. The electronic device of claim 1 , wherein the filled pores have a diameter between 1 and 3 micrometer, and an aspect ratio, defined as the ratio of trench depth over trench diameter, of between 10 and 30.

15. An electronic circuit comprising an electronic device of claim 1 .

16. The electronic circuit of claim 15 , comprising a charge-pump circuit that includes an electronic device.

17. The electronic circuit of claim 15 , which is configured as a DC-to-DC voltage converter.

Assignments (16)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CHANGE OF NAME Recorded Dec 12, 2017
From: IPDIA
To: MURATA INTEGRATED PASSIVE SOLUTIONS
Reel/Frame 044744/0405 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
PATENT RELEASE Recorded Aug 17, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 039707/0471 →
CORRECTION BY DECLARATION OF ERRONEOUSLY FILED ASSIGNMENT AT REEL 024686 FRAME 0839 Recorded Aug 15, 2016
From: IPDIA
To: IPDIA
Reel/Frame 039683/0129 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
CORRECTIVE ASSIGNMENT TO CORRECT THE CHANGE THE NATURE OF CONVEYANCE TO PATENT RELEASE AND CORRECT THE UNDERLYING DOCUMENT PREVIOUSLY RECORDED ON REEL 038914 FRAME 0094. ASSIGNOR(S) HEREBY CONFIRMS THE CERTIFICATE RE TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS. Recorded Jul 12, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS GLOBAL COLLATERAL AGENT; MORGAN STANLEY SENIOR FUNDING, INC., AS RCF ADMINISTRATIVE AGENT; MORGAN STANLEY SENIOR FUNDING, INC., AS THE NOTES COLLATERAL AGENT
To: NXP B.V.
Reel/Frame 039309/0906 →
CERTIFICATE RE TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS Recorded Jun 8, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS GLOBAL COLLATERAL AGENT; MORGAN STANLEY SENIOR FUNDING, INC., AS RCF ADMINISTRATIVE AGENT; MORGAN STANLEY SENIOR FUNDING, INC., AS THE NOTES COLLATERAL AGENT
To: NXP B.V.
Reel/Frame 038914/0094 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
OWNERSHIP TRANSFER Recorded Jul 16, 2010
From: NXP B.V.
To: IPDIA
Reel/Frame 024686/0839 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 19, 2008
From: ROOZEBOOM, FREDDY; KLOOTWIJK, JOHAN H; KEMMEREN, ANTONIUS L. A. M.; REEFMAN, DERK; VERHOEVEN, JOHANNES F. C. M.
To: NXP B.V.
Reel/Frame 020966/0300 →