Apparatus and method for color shift compensation in displays
View Patent ↗Active matrix display module ( 10 ) comprising a driving circuit with a source driver ( 20 ) and a gate driver ( 12 ). Furthermore, a display panel ( 11 ) with pixels consisting of three sub-pixels is provided. The sub-pixels are arranged in rows and columns and each sub-pixel comprises a sub-pixel selection transistor arranged at an intersection of a row and a column. The gate driver ( 12 ) is employed to select and deselect all pixels of a row of the display panel ( 11 ) and the source driver ( 20 ) is employed for providing the required voltage levels to all sub-pixels of a currently selected row, said voltage levels corresponding to the desired intensity for each color. Demultiplexer switches ( 21 ) are integrated onto the display panel ( 11 ) for demultiplexing columns of the display panel ( 11 ). The active matrix display module ( 10 ) further comprises means ( 18 ) for color shift compensation. These means ( 18 ) implement a selection order for the selection of the sub-pixels to compensate unintentional color shifts. The compensation takes place within two frames.
1. Method for color shift compensation implemented in an active matrix display module comprising a driving circuit with a source driver and a gate driver, and a display panel with pixels consisting of three sub-pixels being arranged in demultiplexing columns, each sub-pixel comprising a sub-pixel selection transistor arranged at an intersection of a row and a column and corresponding demultiplexer selection lines implementing a 1:3 multiplexing scheme where each pixel belongs to a different multiplexing group, the method comprising the following steps:
during a first frame:
(a) selecting a row by the gate driver,
(b) charging all sub-pixels in the middle of respective multiplexing groups of said row, each multiplexing group consisting of three sub-pixels, with respective predetermined voltage polarities by respective source driver lines responsive to application of a respective signal pulse on a corresponding demultiplexer selection line,
(c) charging one of the two neighboring sub-pixels of the middle sub-pixel of each multiplexing group of said row with a first voltage polarity, and selecting an adjacent sub-pixel of an adjacent multiplexing group at the same time,
(d) charging the other neighbor sub-pixel of the middle sub-pixel of each multiplexing group of said row with a second voltage polarity opposite to the first voltage polarity, whereby two sub-pixels of the two adjacent multiplexing groups are selected simultaneously,
(e) repeating the steps (a)-(d) for every row until the whole display panel is addressed,
during a second, subsequent frame:
(f) inverting the respective polarities of the two neighboring sub-pixels of the middle sub-pixel of each multiplexing group of a row and charging the respective middle sub-pixels with the respective predetermined voltage polarities,
(g) repeating the step (f) for every row until the whole display has been addressed.
2. The method of claim 1 whereby the steps at said first and second frames are repeated with inverted polarity at each sub-pixel in order to average out the DC value on each sub-pixel to 0V.