IP Library Granted Patent US 8,139,176
Granted Patent B2
US 8,139,176 · App. 12/098,176 · Granted Mar 20, 2012

Display substrate, a method of manufacturing the display substrate and a display apparatus having the display substrate

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Quick Facts
Patent No.
US 8,139,176
App. No.
12/098,176
Granted
Mar 20, 2012
Kind
B2
Abstract

A display substrate includes a gate line, a data line, a thin film transistor, a pixel electrode, and a light blocking layer. The data line is insulated from the gate line and crosses the gate line. The thin film transistor is connected to the gate line and the data line. The thin film transistor is formed in a pixel. The pixel electrode is formed in the pixel and connected to the thin film transistor. The light blocking layer is formed from a same layer as the data line, wherein the light blocking layer is adjacent to a side of the data line.

Claims (33)

1. A display substrate, comprising:

a gate line;

a data line insulated from the gate line, the data line crossing the gate line;

a thin film transistor connected to the gate line and the data line and formed in a pixel;

a pixel electrode formed in the pixel and connected to the thin film transistor; and

a light blocking layer formed from a same layer as the data line, wherein the light blocking layer is adjacent to a side of the data line and directly connected to a drain electrode of the thin film transistor, and wherein a first insulating layer is disposed between a surface of the display substrate and the light blocking layer in an area where the light blocking layer is overlapped by the pixel electrode.

2. The display substrate of claim 1 , wherein the thin film transistor comprises:

a gate electrode connected to the gate line; and

a source electrode connected to the data line,

wherein the drain electrode is spaced apart from the source electrode and electrically connected to the pixel electrode.

3. The display substrate of claim 2 , wherein the light blocking layer is electrically separated from the data line, and the source electrode.

4. The display substrate of claim 2 ,

wherein the first insulating layer is formed between a first metal pattern having the gate line and the gate electrode, and a second metal pattern having the data line, the source electrode, the drain electrode and the light blocking layer; and the display substrate further comprises:

a second insulating layer formed between the pixel electrode and the second metal pattern having the data line, the source electrode, the drain electrode, and the light blocking layer, the second insulating layer having a contact hole, through which the pixel electrode is electrically connected to the drain electrode.

5. The display substrate of claim 4 , wherein the thin film transistor further comprises an active pattern formed between the first insulating layer and the source and drain electrodes.

6. The display substrate of claim 1 , wherein a distance between the light blocking layer and the data line is about 3.0 μm to about 4.0 μm.

7. The display substrate of claim 1 , wherein an edge portion of the pixel electrode overlaps with the light blocking layer.

8. A display apparatus, comprising:

a first display substrate including:

a gate line;

a data line insulated from the gate line, the data line crossing the gate line;

a thin film transistor connected to the gate line and the data line and formed in a pixel;

a pixel electrode formed in the pixel and connected to the thin film transistor; and

a light blocking layer formed from a same layer as the data line, wherein the light blocking layer is disposed adjacent to a side of the data line and directly connected to a drain electrode of the thin film transistor, and

wherein a first insulating layer is disposed between a surface of the first display substrate and the light blocking layer in an area where the light blocking layer is overlapped by the pixel electrode;

a second display substrate opposite to the first display substrate, the second display substrate including a black matrix formed between the pixels to cover the data line and the light blocking layer; and

a liquid crystal layer disposed between the first display substrate and the second display substrate.

9. The display apparatus of claim 8 , wherein the thin film transistor comprises:

a gate electrode connected to the gate line; and

a source electrode connected to the data line,

wherein the drain electrode is spaced apart from the source electrode and electrically connected to the pixel electrode.

10. The display apparatus of claim 9 , wherein the light blocking layer is electrically separated from the data line, and the source electrode.

11. The display apparatus of claim 8 , wherein a distance between the light blocking layer and the data line is about 3.0 μm to about 4.0 μm.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2012
From: SAMSUNG ELECTRONICS CO., LTD.
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 029045/0860 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 4, 2008
From: LEE, KYUNG-JIN; KIM, KYUNG-WOOK; KIM, HYUK-JIN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 020792/0657 →