Guard wafer for semiconductor structure fabrication
View Patent ↗An apparatus which allows tightly coupling of the device wafer to the electrostatic chuck of the process chamber after the process chamber is conditioned. The apparatus includes (a) a process chamber; (b) a chuck in the process chamber; (c) a guard wafer placed on and in direct physical contact with the chuck; and (d) a particle restraining layer on essentially all surfaces that are exposed to the ambient inside the process chamber. The particle restraining layer has a thickness in a first direction of at least 500 nm. The first direction is essentially perpendicular to an interfacing surface between the particle restraining layer and the chuck. The guard wafer comprises a material selected from the group consisting of a metal and a semiconductor oxide.
1. An apparatus, comprising:
(a) a process chamber;
(b) a chuck in the process chamber;
(c) a guard wafer placed on and in direct physical contact with the chuck; and
(d) a particle restraining layer on essentially all surfaces that are exposed to the ambient inside the process chamber,
wherein the particle restraining layer has a thickness in a first direction of at least 500 nm,
wherein the first direction is essentially perpendicular to an interfacing surface between the particle restraining layer and the chuck, and
wherein the guard wafer comprises a material selected from the group consisting of a metal and a semiconductor oxide.
2. The apparatus of claim 1 , wherein the guard wafer comprises essentially aluminum.
3. The apparatus of claim 1 , wherein the guard wafer comprises an aluminum alloy.
4. The apparatus of claim 1 , wherein the guard wafer comprises an alloy not including aluminum.
5. The apparatus of claim 1 , wherein the guard wafer comprises an iron alloy.
6. The apparatus of claim 1 , wherein the guard wafer comprises a semiconductor oxide.
7. The apparatus of claim 6 , wherein the semiconductor oxide comprises silicon dioxide.