Multiphase voltage regulators and methods for voltage regulation

1. A multiphase voltage regulator system, comprising:

a microcontroller unit (MCU) including

a digital to analog converter (DAC) for generating a reference voltage; and

a timing generator for generating n-phase start timing signals;

a comparator for comparing the reference voltage and the output voltage to generate a comparison result; and

at least n points of load (POLs) coupled between the MCU and a load for controlling the output voltage in response to the n-phase start timing signals and the comparison result, wherein each POL includes a high-side transistor, a low-side transistor, and a driver for driving the transistors, and wherein the driver includes a D-FlipFlop having a D terminal, a clock terminal, a Q terminal, a /Q terminal and a reset terminal, the D terminal coupled High, the clock terminal coupled to receive a control signal based on a respective one of the n-phase start timing signals, the Q terminal coupled to drive the high-side transistor, the /Q terminal coupled to drive the low-side transistor, and the reset terminal coupled to receive a reset control signal based on the comparison result.

2. The system of claim 1 , wherein each POL includes enable circuitry to deactivate and isolate the POL.

3. The system of claim 2 , wherein the MCU includes an enable line coupled to the enable circuitry to control activation of each POL.

4. The system of claim 3 , wherein the timing generator changes the phase of the n-phase start timing signals and maintains the cycle time of the n-phase start timing signals constant regardless of the number of active phases.

5. The system of claim 3 , wherein the timing generator changes the phase of the n-phase start timing signals and modifies the cycle time of the n-phase start timing signals based on the number of active phases.

6. The system of claim 1 , wherein the DAC changes the reference voltage in steps.

7. The system of claim 1 , wherein

the MCU further includes a second DAC for generating a second reference voltage, the MCU being capable of generating y-phase start timing signals; and

the system further includes

a second comparator for comparing the second reference voltage and the second output voltage to generate a second comparison result; and

at least y second points of load coupled between the MCU and a second load for controlling the second output voltage in response to the y-phase start timing signals and the second comparison result.

8. The system of claim 1 , wherein the MCU includes an analog to digital converter (ADC) to detect output current.

9. The system of claim 1 , wherein the MCU includes an analog to digital converter (ADC) to detect load temperature.

10. The system of claim 1 , wherein the comparator is an amplifier.

11. The system of claim 1 , wherein the comparator is a subtraction amplifier.

12. A multiphase voltage regulator system, comprising:

a microcontroller unit (MCU) including

a register for storing a digital reference voltage value;

an analog to digital converter (ADC) for converting an output voltage to a digital output voltage value;

a digital comparator for comparing the digital reference voltage value and the digital output voltage value to generate a comparison result; and

a timing generator for generating n-phase start timing signals; and

at least n points of load (POLs) coupled between the MCU and a load for controlling the output voltage in response to the n-phase start timing signals and the comparison result, wherein each POL includes enable circuitry to deactivate the POL.

13. The system of claim 12 , wherein the MCU includes an enable line coupled to the enable circuitry of each POL to control activation of each POL.

14. The system of claim 13 , wherein the MCU is designed to disable at least one POL and enable the remaining POLs.

15. The system of claim 12 , wherein the reference register is operative to modify the reference voltage value in steps.

16. The system of claim 12 , further includes

the system a second load for receiving a second output voltage; the MCU further includes

a second digital reference voltage value,

a second ADC for converting the second output voltage to a second digital output voltage value,

a second digital comparator for comparing the second digital reference voltage value and the second digital output voltage value to generate a second comparison result, and

a second timing generator for generating y-phase start timing signals; and

the system further includes at least y second points of load coupled between the MCU and the second load for controlling the second output voltage in response to the y-phase start timing signals and the second comparison result.

17. The system of claim 12 , wherein the MCU includes an analog to digital converter (ADC) to detect output current.

18. The system of claim 12 , wherein the MCU includes an analog to digital converter (ADC) to detect load temperature.

19. A method comprising:

generating a reference voltage with a microcontroller unit (MCU);

generating n-phase start timing signals with the MCU;

receiving an output voltage at a load;

comparing the reference voltage and the output voltage to generate a comparison result;

using the n-phase start timing signals to drive n points of load (POLs) in a phase-shifted manner, each POL driving the output voltage in a first direction based on the n-phase start timing signals;

using the comparison result to drive the n POLs in a phase-shifted manner, each POL driving the output voltage in a second direction based on the comparison result, thereby generating a multiphase voltage-regulated signal to control the output voltage;

enabling n POLs; and

disabling at least one POL.

20. The method of claim 19 , wherein the phase shift is approximately 2π/n.

21. The method of claim 19 , wherein the first direction includes upward and the second direction includes downward.

22. The method of claim 19 , wherein the reference voltage is generated using a digital to analog converter (DAC).

23. The method of claim 19 , wherein the n-phase start timing signals are generated using a counter.

24. The method of claim 19 , wherein the step of comparing includes subtracting the output voltage from the reference voltage to generate a comparison result.

25. A multiphase voltage regulator system, comprising:

a microcontroller unit (MCU) including

a digital to analog converter (DAC) for generating a reference voltage; and

a timing generator for generating n-phase start timing signals;

a comparator for comparing the reference voltage and the output voltage to generate a comparison result; and

at least n points of load (POLs) coupled between the MCU and the load for controlling the output voltage in response to the n-phase start timing signals and the comparison result, wherein each POL includes enable circuitry to deactivate and isolate the POL.

26. The system of claim 25 , wherein the MCU includes an enable line coupled to the enable circuitry of each POL to control activation of each POL.

27. The system of claim 26 , wherein the MCU is designed to disable at least one POL and enable the remaining POLs.

28. The system of claim 25 ,

wherein each POL includes a high-side transistor, a low-side transistor, and a driver for driving the transistors, and

wherein the driver includes a D-FlipFlop having a D terminal, a clock terminal, a Q terminal, a /Q terminal and a reset terminal, the D terminal coupled High, the clock terminal coupled to receive a control signal based on a respective one of the n-phase start timing signals, the Q terminal coupled to drive the high-side transistor, the /Q terminal coupled to drive the low-side transistor, and the reset terminal coupled to receive a reset control signal based on the comparison result.

29. The system of claim 28 , wherein the timing generator changes the phase of the n-phase start timing signals and maintains the cycle time of the n-phase start timing signals constant regardless of the number of active phases.

30. The system of claim 28 , wherein the timing generator changes the phase of the n-phase start timing signals and modifies the cycle time of the n-phase start timing signals based on the number of active phases.

31. The system of claim 25 , wherein

the MCU further includes a second DAC for generating a second reference voltage, the MCU being capable of generating y-phase start timing signals; and

the system further includes

a second load for receiving a second output voltage;

a second comparator for comparing the second reference voltage and the second output voltage to generate a second comparison result; and

at least y second points of load coupled between the MCU and the second load for controlling the second output voltage in response to the y-phase start timing signals and the second comparison result.

32. The system of claim 1 , wherein the comparator is an amplifier.