IP Library Granted Patent US 7,844,786
Granted Patent B2
US 7,844,786 · App. 12/107,278 · Granted Nov 30, 2010

Addressing and command protocols for non-volatile memories utilized in recording usage counts

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Quick Facts
Patent No.
US 7,844,786
App. No.
12/107,278
Granted
Nov 30, 2010
Kind
B2
Abstract

Electrical interfaces, addressing schemes, and command protocols allow for communications with memory modules in computing devices such as imaging and printing devices. Memory modules may be assigned an address through a set of discrete voltages. One, multiple, or all of the memory modules may be addressed with a single command, which may be an increment counter command, a write command, or a punch out bit field. The status of the memory modules may be determined by sampling a single signal that may be at a low, high, or intermediate voltage level.

Claims (22)

1. A method of updating memory modules, comprising:

receiving, at one or more memory modules, a command transmitted from a processing device, wherein the command comprises a) an increment counter command operable to instruct the one or more memory modules to increment a counter within the one or more memory modules and b) a punch out bit field command operable to instruct the one or more memory modules to punch out a specified bit field within the one or more memory modules; and

processing the command at the one or more memory modules.

2. The method of claim 1 , wherein processing the command comprises incrementing, in each of the one or more memory modules, at least one counter.

3. The method of claim 2 , wherein incrementing further comprises incrementing, in each of the one or more memory modules, the at least one counter by an increment value specified in the command.

4. The method of claim 2 , wherein the command further comprises memory module addresses corresponding to each of the one or more one or memory modules.

5. The method of claim 1 , further comprising establishing a busy status signal during the processing of the command at the one or more memory modules.

6. The method of claim 1 , wherein receiving further comprises receiving, at the one or more memory modules, the command from the processing device transmitted to the one or more memory modules via an asynchronous data channel.

7. The method of claim 1 , wherein the punch out bit field command comprises implementing a command to change a bit associated with at least one memory module from an erased state to a programmed state.

8. The method of claim 1 , wherein the bit field comprises at least eight bits.

9. A method of updating memory modules, comprising:

receiving, at one or more memory modules, a command transmitted from a processing device, wherein the command is a) a punch out bit field command operable to instruct the one or more memory modules to punch out a specified bit field within the one or more memory modules and b) an increment counter command operable to instruct the one or more memory modules to increment a counter within the one or more memory modules; and

processing the command at the one or more memory modules.

10. The method of claim 9 , wherein the punch out bit field command comprises implementing a command to change a bit associated with at least one memory module from an erased state to a programmed state.

11. The method of claim 9 , wherein the bit field comprises at least eight bits.

12. The method of claim 9 , wherein receiving further comprises receiving, at the one or more memory modules, the command from the processing device transmitted to the one or more memory modules via an asynchronous data channel.

13. The method of claim 9 , wherein processing the command comprises incrementing, in each of the one or more memory modules, said counter.

14. The method of claim 9 , wherein incrementing further comprises incrementing, in each of the one or more memory modules, the counter by an increment value specified in the command.

15. The method of claim 9 , further comprising establishing a busy status signal during the processing of the command at the one or more memory modules.

16. A method of updating memory modules in an imaging device, comprising:

receiving, at one or more memory modules, a command transmitted from a processing device, wherein the command is indicative of usage of toner or ink in a consumable item in the imaging device and is operable to instruct the one or more memory modules to punch out a specified bit within the one or more memory modules indicative of said usage of toner or ink; and

processing the command at the one or more memory modules.

Assignments (8)
SECURITY INTEREST Recorded Jan 5, 2026
From: LEXMARK INTERNATIONAL, INC.
To: BANK TRUST COMPANY, NATIONAL ASSOCIATION
Reel/Frame 074202/0192 →
SECURITY INTEREST Recorded Jan 5, 2026
From: LEXMARK INTERNATIONAL, INC.
To: BANK TRUST COMPANY, NATIONAL ASSOCIATION
Reel/Frame 074202/0293 →
SECURITY INTEREST Recorded Sep 23, 2025
From: LEXMARK INTERNATIONAL, INC.
To: CITIBANK, N.A.
Reel/Frame 073007/0118 →
SECURITY INTEREST Recorded Sep 23, 2025
From: LEXMARK INTERNATIONAL, INC.
To: JEFFERIES FINANCE LLC
Reel/Frame 073007/0346 →
RELEASE OF SECURITY INTEREST Recorded Jan 18, 2024
From: CHINA CITIC BANK CORPORATION LIMITED, GUANGZHOU BRANCH, AS COLLATERAL AGENT
To: LEXMARK INTERNATIONAL, INC.
Reel/Frame 066345/0026 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT U.S. PATENT NUMBER PREVIOUSLY RECORDED AT REEL: 046989 FRAME: 0396. ASSIGNOR(S) HEREBY CONFIRMS THE PATENT SECURITY AGREEMENT. Recorded Oct 24, 2018
From: LEXMARK INTERNATIONAL, INC.
To: CHINA CITIC BANK CORPORATION LIMITED, GUANGZHOU BRANCH, AS COLLATERAL AGENT
Reel/Frame 047760/0795 →
PATENT SECURITY AGREEMENT Recorded Aug 30, 2018
From: LEXMARK INTERNATIONAL, INC.
To: CHINA CITIC BANK CORPORATION LIMITED, GUANGZHOU BRANCH, AS COLLATERAL AGENT
Reel/Frame 046989/0396 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2016
From: BOOTH, JAMES RONALD; WILLETT, BRYAN SCOTT
To: LEXMARK INTERNATIONAL, INC.
Reel/Frame 038395/0552 →