IP Library Patent Application 12115410
Patent Application
App. No. 12/115,410

METHOD AND DEVICE FOR DATA INTEGRITY CHECKING

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Quick Facts
Patent No.
US None
App. No.
12/115,410
Abstract

The present invention relates to high speed datapaths, sometimes including mixed digital and analog voltage signals. In particular, it relates to error checking strategies for large data volumes, in digital and/or analog domains and to analog signal patterns that accelerate charge loading of micromirrors in an SLM. Particular aspects of the present invention are described in the claims, specification and drawings.

Claims (13)

1 . A method of detecting errors in a very high volume data stream using a summary value function, including:

dividing the data stream into segments of data;

calculating predicted diagnostic values that predict summary values for the segments of data;

during operation of a data path that transmits the data stream to an SLM, calculating actual diagnostic values that summarize values for the of the segments of data;

comparing the actual and predicted diagnostic values;

and in case of a discrepancy between the actual and predicted diagnostic values, identifying and reporting a segment causing the discrepancy from the diagnostic values.

2 . The method of claim 1 , wherein the predicted diagnostic values are produced by a linear summary value function.

3 . The method of claim 1 , wherein the predicted diagnostic values are produced by a linear summary value function, such that parts of the diagnostic values correspond to subsegments within the respective segments of data.

4 . The method of claim 1 , wherein the predicted diagnostic values are produced by a nonlinear summary value function.

5 . The method of claim 1 , wherein the comparing takes place as generation of the actual diagnostic values proceeds.

6 . The method of claim 5 , wherein the predicted diagnostic values are generated concurrently with the actual diagnostic values by a redundant component.

7 . The method of claim 5 , wherein the predicted diagnostic values are generated in advance of generating the actual diagnostic values.

8 . The method of claim 1 , wherein the comparing operates on stored actual diagnostic values, using time slices when the SLM chip is not being used to generate patterns.