IP Library Granted Patent US 9,058,483
Granted Patent B2
US 9,058,483 · App. 12/117,634 · Granted Jun 16, 2015

Method for validating an untrusted native code module

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Quick Facts
Patent No.
US 9,058,483
App. No.
12/117,634
Granted
Jun 16, 2015
Kind
B2
Abstract

A system that validates a native code module. During operation, the system receives a native code module comprised of untrusted native program code. The system validates the native code module by: (1) determining that code in the native code module does not include any restricted instructions and/or does not access restricted features of a computing device; and (2) determining that the instructions in the native code module are aligned along byte boundaries such that a specified set of byte boundaries always contain a valid instruction and control flow instructions have valid targets. The system allows successfully-validated native code modules to execute, and rejects native code modules that fail validation. By validating the native code module, the system facilitates safely executing the native code module in the secure runtime environment on the computing device, thereby achieving native code performance for untrusted program binaries without significant risk of unwanted side effects.

Claims (33)

1. A method comprising:

in a computing device, performing operations of:

receiving a native code module of instructions, wherein the instructions are expressed using an instruction set architecture associated with the computing device, and wherein the instructions include control flow instructions, the control flow instructions each having a respective target;

loading the instructions into a memory of the computing device; and

performing static binary analysis on the native code module in a secure runtime environment to validate that the instructions that are loaded into the memory will execute safely within the memory, including:

determining that the instructions (i) do not include restricted instructions and (ii) do not access restricted features of the computing device;

determining that the instructions are laid out in a region of the memory that includes a plurality of byte boundaries so that for each byte boundary in the plurality of byte boundaries that satisfies an alignment granularity condition within the region of the memory, an instruction is aligned along the byte boundary; and

determining that the respective target of each control flow instruction that is loaded into the memory is an instruction that is aligned along one of the byte boundaries in the plurality of byte boundaries that satisfies the alignment granularity condition within the region of the memory.

2. The method of claim 1 , wherein the instruction set architecture is the x86 instruction set architecture.

3. The method of claim 1 , wherein receiving the native code module of instructions includes receiving the native code module within a web browser.

4. The method of claim 3 , wherein the native code module is operating-system neutral, and can support applications across multiple operating systems that can run on the instruction set architecture of the computing device.

5. The method of claim 1 , further comprising:

in the computing device, performing the operation of generating the native code module using a compilation process that ensures that the native code module can be successfully validated.

6. The method of claim 5 , wherein at least one of compiling or performing static binary analysis to validate the native code module further involves one or more of the following:

changing an unsafe instruction into a safe instruction; and

determining whether a byte sequence in the native code module is supported for a given hardware implementation of the instruction set architecture and disallowing an unsupported byte sequence in the native code module.

7. A non-transitory computer-readable storage medium storing instructions that when executed by a computer cause the computer to perform operations comprising:

receiving a native code module of instructions, wherein the instructions are expressed using an instruction set architecture associated with the computer, and wherein the instructions include control flow instructions, the control flow instructions each having a respective target;

loading the instructions into a memory of the computer; and

performing static binary analysis on the native code module in a secure runtime environment to validate that the instructions that are loaded into the memory will execute safely within the memory, including:

determining that the instructions (i) do not include restricted instructions and (ii) do not access restricted features of the computer;

determining that the instructions are laid out in a region of the memory that includes a plurality of byte boundaries so that for each byte boundary in the plurality of byte boundaries that satisfies an alignment granularity condition within the region of the memory, an instruction is aligned along the byte boundary; and

determining that the respective target of each control flow instruction that is loaded into the memory is an instruction that is aligned along one of the byte boundaries in the plurality of byte boundaries that satisfies the alignment granularity condition within the region of the memory.

8. The non-transitory computer-readable storage medium of claim 7 , wherein the instruction set architecture is the x86 instruction set architecture.

9. The non-transitory computer-readable storage medium of claim 7 , wherein receiving the native code module of instructions includes receiving the native code module within a web browser.

10. The non-transitory computer-readable storage medium of claim 7 , wherein the native code module is operating-system neutral, and can support applications across multiple operating systems that can run on the instruction set architecture of the computing device.

11. The non-transitory computer-readable storage medium of claim 7 , wherein performing static binary analysis on the native code module in a secure runtime environment to validate that the instructions that are loaded into the memory will execute safely within the memory further includes one or more of the following:

changing an unsafe instruction into a safe instruction; and

determining whether a byte sequence in the native code module is supported for a given hardware implementation of the instruction set architecture, and disallowing an unsupported byte sequence in the native code module.

12. The method of claim 1 , wherein a target of one of the control flow instructions that is loaded into the memory is computed at runtime.

13. The non-transitory computer-readable storage medium of claim 7 , wherein a target of one of the control flow instructions that is loaded into the memory is computed at runtime.

14. The method of claim 1 , wherein the alignment granularity condition specifies that each of the bye boundaries in the plurality of byte boundaries is a power-of-2 byte boundary.

15. The non-transitory computer-readable medium of claim 7 , wherein the alignment granularity condition specifies that each of the byte boundaries in the plurality of byte boundaries is a power-of-2 byte boundary.

Assignments (2)
CHANGE OF NAME Recorded Oct 2, 2017
From: GOOGLE INC.
To: GOOGLE LLC
Reel/Frame 044334/0466 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 3, 2008
From: CHEN, J. BRADLEY; HARREN, MATTHEW T.; PAPAKIPOS, MATTHEW; SEHR, DAVID C.; YEE, BENNET S.
To: GOOGLE INC.
Reel/Frame 021044/0366 →