Semiconductor device and method of manufacturing the same
View Patent ↗A semiconductor device is provided with first and second silicon pillars formed substantially perpendicularly to a main surface of a substrate, a gate electrode covering side surfaces of the first and second silicon pillars via a gate insulation film, first and second diffusion layers provided on a lower part and an upper part of the first silicon pillar, respectively, a cap insulation film covering an upper part of the second silicon pillar, a gate contact connected to the gate electrode, and a protection insulation film in contact with the upper surfaces of the first and second silicon pillars. The gate contact is connected to an upper region of the gate electrode provided at the periphery of the cap insulation film. An opening is formed on the protection insulation film provided at the side of the first silicon pillar.
1. A semiconductor device comprising: first and second silicon pillars formed substantially perpendicularly to a main surface of a substrate; a gate electrode covering side surfaces of the first and second silicon pillars via a gate insulation film; first and second diffusion layers provided on a lower part and an upper part of the first silicon pillar, respectively; a cap insulation film substantially covering an upper part surface of the second silicon pillar; and a gate contact connected to the gate electrode, wherein the gate contact is connected to an upper region of the gate electrode provided at the periphery of the cap insulation film.
2. The semiconductor device as claimed in claim 1 , wherein a distance between the first silicon pillar and the second silicon pillar is smaller than two times a film thickness of the gate electrode.
3. The semiconductor device as claimed in claim 1 further comprising first and second protection insulation films in contact with the upper surfaces of the first and second silicon pillars, respectively,
wherein the first protection insulation film has an opening to expose a part of upper surface of the first silicon pillar, and the second protection insulation film entirely covers the upper surface of the second silicon pillar.
4. The semiconductor device as claimed in claim 3 , wherein the second diffusion layer is in contact with the upper surface of the first silicon pillar via the opening.
5. The semiconductor device as claimed in claim 4 , further comprising a cylindrical sidewall insulation film intervening between the second diffusion layer and the gate electrode so as to insulate therebetween.
6. The semiconductor device as claimed in claim 5 , wherein a planar position of an external periphery of the cylindrical sidewall insulation film and a planar position of an external periphery of the first silicon pillar substantially coincide with each other.
7. The semiconductor device as claimed in claim 1 , wherein a planar area of the second silicon pillar is larger than a planar area of the first silicon pillar.
8. The semiconductor device as claimed in claim 1 , wherein the cap insulation film is formed of an insulating material.
9. The semiconductor device as claimed in claim 8 , wherein the insulating material is silicon nitride.
10. A semiconductor device comprising:
first and second silicon pillars formed substantially perpendicularly to a main surface of a substrate;
a gate electrode covering side surfaces of the first and second silicon pillars via a gate insulation film;
first and second diffusion layers provided on a lower part and an upper part of the first silicon pillar, respectively;
a gate contact connected to the gate electrode;
a first diffusion layer contact connected to the first diffusion layer; and
a second diffusion layer contact connected to the second diffusion layer, wherein
the second diffusion layer contact is formed above the first silicon pillar, and the gate contact is formed above the second silicon pillar.
11. The semiconductor device as claimed in claim 10 , wherein a distance between the first silicon pillar and the second silicon pillar is smaller than two times a thickness of the gate electrode.
12. The semiconductor device as claimed in claim 10 , further comprising a cap insulation film covering an upper part of the second silicon pillar, wherein
the gate contact is connected to an upper region of the gate electrode provided on the periphery of the cap insulation film.
13. A semiconductor device comprising:
first and second silicon pillars formed substantially perpendicularly to a main surface of a substrate;
a gate electrode covering side surfaces of the first and second silicon pillars via a gate insulation film;
first and second diffusion layers provided on a lower part and an upper part of the first silicon pillar, respectively;
a cap insulation film covering an upper part of the second silicon pillar; and
a gate contact connected to the gate electrode, wherein
the gate contact is connected to an upper region of the gate electrode provided at the periphery of the cap insulation film, and
first and second protection insulation films in contact with the upper surfaces of the first and second silicon pillars, respectively,
wherein the first protection insulation film has an opening to expose a part of upper surface of the first silicon pillar, and the second protection insulation film entirely covers the upper surface of the second silicon pillar.
14. The semiconductor device as claimed in claim 13 , wherein the second diffusion layer is in contact with the upper surface of the first silicon pillar via the opening.
15. The semiconductor device as claimed in claim 14 , further comprising a cylindrical sidewall insulation film intervening between the second diffusion layer and the gate electrode so as to insulate therebetween.
16. The semiconductor device as claimed in claim 15 , wherein a planar position of an external periphery of the cylindrical sidewall insulation film and a planar position of an external periphery of the first silicon pillar substantially coincide with each other.