Granted Patent B2

US 8,335,663 · App. 12/126,345 · Granted Dec 18, 2012

Abstract

Claims (34)

1. A system for signal processing comprising:

a steady state demodulator system for receiving a modulated signal and demodulating the modulated signal if the modulated signal has been acquired, and outputting the modulated signal if the modulated signal has not been acquired; and

a general purpose processing system coupled to the steady state demodulator system, the general purpose processing system comprising: a signal acquisition system for receiving the modulated signal and generating acquisition data;

wherein the steady state processing system can receive the acquisition data from the signal acquisition system and use the acquisition data to acquire the signal; and

wherein the signal acquisition system comprises a phase offset system for determining a phase offset and generating phase correction data, wherein the phase offset system is inactive, in an idle state and consuming no power prior to receipt of control data from a steady state interface system and provides the phase correction data for provision to the steady state demodulator system.

2. The system of claim 1 wherein the signal acquisition system comprises a frequency offset estimate system for determining an estimate of a frequency offset of the signal and generating frequency offset correction data, wherein the frequency offset estimate system is inactive prior to receipt of control data from a steady state interface system.

3. The system of claim 1 wherein the signal acquisition system comprises a sampling clock offset system for determining an offset of a sampling clock and generating sampling clock correction data, wherein the sampling clock offset system is inactive and consuming no power prior to receipt of control data from a steady state interface system.

4. The system of claim 1 wherein the signal acquisition system comprises a timing offset system for determining a timing offset and generating timing correction data for provision to the steady state demodulator system.

5. The system of claim 1 wherein the steady state demodulator system further comprises an acquisition state system for generating an acquisition request if the modulated signal is being received and has not been acquired and receiving the acquisition data in response to the acquisition request.

6. The system of claim 1 wherein the steady state demodulator system further comprises a steady state monitor system for monitoring steady state signal parameters of the demodulated signal and generating an acquisition request if the steady state signal parameters of the demodulated signal exceed one or more predetermined values.

7. A method for signal processing comprising:

receiving a modulated signal at a receiver of a peripheral system of a general purpose processor;

providing the modulated signal from the peripheral system to the general purpose processor, wherein the general purpose processor instantiates one or more software systems to generate signal acquisition data;

receiving the signal acquisition data from the general purpose processor at the peripheral system;

applying the signal acquisition data to the receiver at the peripheral system to allow the receiver to demodulate the modulated signal; and

wherein the receiver at the peripheral system comprises a phase offset system for determining a phase offset and generating phase correction data, wherein the phase offset system is inactive, in an idle state and consuming no power prior to receipt of control data from a steady state interface system and provides the phase correction data to the receiver for demodulating the modulated signal.

8. The method of claim 7 wherein receiving signal acquisition data comprises receiving frequency offset correction data and using the frequency offset correction data to control a demodulator.

9. The method of claim 7 wherein receiving signal acquisition data comprises receiving sampling clock offset correction data at the peripheral system.

10. The method of claim 7 wherein receiving signal acquisition data comprises receiving timing correction data at the peripheral system and using the timing correction to control a demodulator of the peripheral system.

11. The method of claim 7 wherein receiving signal acquisition data comprises receiving phase correction data.

12. The method of claim 7 further comprising switching from an acquisition mode of operation to a steady state mode of operation at the peripheral system after applying the signal acquisition data to the receiver.

13. The method of claim 7 further comprising:

monitoring the signal during the steady state mode of operation; and

switching from the steady state mode of operation to the acquisition mode of operation if one or more steady state parameters exceed a predetermined level.

14. A system for signal processing comprising:

a steady state processing system having a demodulator, the steady state processing system in a peripheral device, the steady state processing system for receiving a modulated signal;

a general purpose processor remote from the peripheral device, the general purpose processor further comprising a signal acquisition system for receiving the modulated signal and generating acquisition data;

wherein the steady state processing system receives the acquisition data from the signal acquisition system and uses the acquisition data to demodulate the modulated signal, wherein the signal acquisition system switches to inactive status when the steady state processing system is demodulating the modulated signal; and

wherein the signal acquisition system comprises a phase offset system for determining a phase offset and generating phase correction data, wherein the phase offset system is inactive, in an idle state and consuming no power prior to receipt of control data from a steady state interface system and provides the phase correction data for provision to the demodulator of the steady state processing system.

15. The system of claim 14 further comprising means for determining an estimate of a frequency offset of the modulated signal and generating frequency offset correction data.

16. The system of claim 14 further comprising means for determining an offset of a sampling clock and generating sampling clock correction data.

17. The system of claim 14 further comprising means for determining a timing offset and generating timing correction data.

18. The system of claim 14 further comprising means for determining a phase offset and generating phase correction data.

19. The system of claim 14 further comprising means for generating an acquisition request and receiving the acquisition data in response to the acquisition request.

Assignments (10)