IP Library Granted Patent US 7,619,480
Granted Patent B2
US 7,619,480 · App. 12/128,092 · Granted Nov 17, 2009

Distributed class G type amplifier switching method

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Quick Facts
Patent No.
US 7,619,480
App. No.
12/128,092
Granted
Nov 17, 2009
Kind
B2
Abstract

An improved Class G type amplifier is provided which switches between multiple power rails depending upon the instantaneous amplitude of the input signal versus the power rails without excessive distortion. The low voltage (inner) amplifier includes a plurality of parallel amplifier devices, and the high voltage (outer) amplifier includes a plurality of parallel amplifier devices. A plurality of switches each couples the input signal to either a respective one of the inner amplifier devices or a respective one of the outer amplifier devices. The switches are activated sequentially, such that the switching from inner amplifier devices to outer amplifier devices or vice versa is staggered over time. This avoids having a single, large glitch in the output and spreads multiple smaller glitches over enough time so that some of the radiated glitch energy can fall within frequencies where amplifier feedback circuitry can eliminate its noise. The switches are sequentially activated by a series of delay elements.

Claims (31)

1. An amplifier stage comprising:

an input node for receiving an input signal;

an output node for providing an amplified output signal;

a plurality of outer power rails;

a plurality of inner power rails;

a plurality of amplifier devices, each amplifier devices comprising a voltage follower and having,

an input coupled to the input node,

an output coupled to the output node; and

a control mechanism coupled to the amplifier devices to selectively and individually control whether and when each amplifier device is coupled to the outer power rails and the inner power rails, wherein the control mechanism comprises:

plurality of switches each coupled to a respective one of the amplifier devices; and

a delay having an input coupled to receive a signal initiating a shift of the amplifier stage from selected ones to the others of the outer power rails and the inner power rails, and including a series of delay elements each coupled to respective ones of the switches.

2. The amplifier stage of claim 1 wherein the control mechanism further comprises:

a state machine coupled to selectively, individually operate the switches.

3. The amplifier stage of claim 1 wherein each amplifier device comprises:

a current mirror.

4. The amplifier stage of claim 1 further including:

a state machine including means for establishing hysteresis that forces a complete transfer of power supply voltage between the inner rails and the outer rails before allowing power supply voltage to switch back, to prevent oscillatory behavior.

5. A method of amplifying an input signal to produce an output signal, the method comprising:

receiving the input signal at a plurality of switches, wherein each switch is coupled to selectably provide the input signal to either a respective one of a plurality of inner amplifier devices or a respective plurality of outer amplifier devices associated with the switch, depending upon a control signal received by the switch;

comparing the output signal to an inner voltage reference signal which supplies the inner amplifier devices, and, responsive to the comparing,

if a voltage of the output signal becomes great enough that the inner voltage reference signal is inadequate to provide proper amplification by the inner amplifier devices, sequentially causing the plurality of switches to provide the input signal to their respective associated outer amplifier devices, and

if the voltage of the output signal becomes small enough that the inner voltage reference signal is adequate to provide proper amplification by the inner amplifier devices, sequentially causing the plurality of switches to provide the input signal to their respective associated inner amplifier devices;

wherein the sequential causing step is performed by:

passing a result of the comparing through a series of delay elements, each delay element being coupled to provide its delayed output to a control input of a respective associated one of the switches;

whereby the series of delay elements staggers switching of the plurality of switches and thereby spreads switching glitches over period of time.

6. The method of claim 5 further comprising:

performing the receiving, comparing, and alternative sequentially causing steps in both a positive side and a negative side of an amplifier.

7. The method of claim 5 further comprising:

performing the receiving, comparing, and alternative sequentially causing steps in both a positive side and a negative side of an amplifier.

8. The method of claim 5 further including:

employing hysteresis to force a complete transfer of power supply voltage between the inner rails and the outer rails before allowing power supply voltage to switch back, to prevent oscillatory behavior.

Assignments (6)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 058871, FRAME 0799 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 065653/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 040075, FRAME 0644 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0536 →
SECURITY INTEREST Recorded Nov 12, 2021
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 058871/0799 →
RELEASE OF SECURITY INTEREST Recorded Oct 28, 2021
From: DEUTSCHE BANK AG NEW YORK BRANCH
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 057969/0206 →
PATENT SECURITY AGREEMENT Recorded Sep 19, 2016
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 040075/0644 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 20, 2009
From: LEADIS TECHNOLOGY, INC.
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 022427/0461 →