Liquid crystal display device
View Patent ↗A display device includes a TFT substrate with gate signal lines, drain signal lines, thin-film transistors connected thereto, a gate driver connected to the gate signal lines, a drain driver having output terminals connected to drain signal lines, and a film substrate having first wirings. The first wirings are disposed between the drain driver and the film substrate. The drain driver is mounted on the film substrate, and the output terminals are connected to the first wirings between the film substrate and the drain driver. The output terminal includes first group terminals formed in parallel with a longer edge of the drain driver, and second group terminals formed in parallel with the longer edge and disposed between the loner edge and the first group terminals.
1. A display device comprising:
a TFT substrate comprising a plurality of gate signal lines, a plurality of drain signal lines, and a plurality of thin-film transistors connected to the plurality of gate signal lines and the plurality of drain signal lines;
a gate driver electrically connected to the plurality of gate signal lines;
a film substrate comprising a plurality of wirings which are electrically connected to the plurality of drain signal lines; and
a semiconductor integrated circuit mounted on the film substrate and comprising a plurality of input terminals and a plurality of output terminals, the plurality of output terminals are connected to the plurality of wirings,
wherein the film substrate comprises a first surface and a second surface, and the plurality of wirings and the semiconductor integrated circuit are disposed on the first surface of the film substrate,
wherein the plurality of output terminals comprise a first group which consists of first output terminals and a second group which consists of second output terminals, and the plurality of input terminals and the first and second output terminals are arranged in parallel with a longer edge of the semiconductor integrated circuit, and
wherein the first output terminals are disposed between the second output terminals and the plurality of input terminals.
2. A display device according to claim 1 ,
wherein the semiconductor integrated circuit is configured on a semiconductor chip.
3. A display device according to claim 2 ,
wherein the first output terminals are disposed at a central portion along a relatively short side direction of the semiconductor chip.
4. A display device according to claim 3 ,
wherein the semiconductor integrated circuit comprises a decoder circuit and a data latch circuit disposed between the first output terminals and the second output terminals.
5. A display device according to claim 4 ,
wherein the plurality of wirings comprises first wirings connected to the first output terminals, the first wirings are disposed between the semiconductor chip and the film substrate.
6. A display device according to claim 5 ,
wherein a part of the first wirings are disposed between a decoder circuit of the semiconductor integrated circuit and the film substrate.
7. A display device according to claim 5 ,
wherein a part of the first wirings are disposed between the first output terminals and the second output terminals.
8. A display device according to claim 2 ,
wherein the semiconductor integrated circuit further comprises a first input terminal and a second input terminal, and the film substrate further comprises a second wiring on the first surface, and
wherein the first input terminal and the second input terminal are connected by the second wiring.
9. A display device according to claim 8 ,
wherein the second wiring is a power supply wiring.
10. A display device according to claim 8 ,
wherein the second wiring is a clock supply wiring.
11. A display device comprising:
a TFT substrate comprising a plurality of gate signal lines, a plurality of drain signal lines, and a plurality of thin-film transistors connected to the plurality of gate signal lines and the plurality of drain signal lines;
a gate driver electrically connected to the plurality of gate signal lines;
a film substrate comprising a plurality of wirings; and
a semiconductor chip mounted on the film substrate by chip-on-film techniques and comprising a plurality of input terminals and a plurality of output terminals, the plurality of output terminals are connected to the plurality of wirings,
wherein the film substrate comprises a first surface and a second surface, and the plurality of wirings and the semiconductor chip are disposed on the first surface,
wherein the plurality of output terminals comprise a first group which consists of first output terminals and a second group which consists of second output terminals, and the plurality of input terminals and the first and second output terminals are arranged in parallel with a longer edge of the semiconductor chip, and
wherein the first output terminals are disposed between the second output terminals and the plurality of input terminals, and
wherein the plurality of wirings disposed on the first surface of the film substrate are electrically connected to the plurality of drain signal lines, and a part of the plurality of wirings overlaps the semiconductor chip.