IP Library Patent Application 12131541
Patent Application
App. No. 12/131,541

SEMICONDUCTOR DEVICE

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Quick Facts
Patent No.
US None
App. No.
12/131,541
Abstract

A semiconductor device includes a semiconductor chip and a metal layer electrically coupled to the semiconductor chip. The semiconductor device includes an array of solder balls coupled to the metal layer and a front side protect material directly contacting the metal layer and laterally surrounding a portion of at least a plurality of solder balls. The front side protect material is configured to become fluid during solder reflow.

Claims (50)

1 . A semiconductor device comprising:

a semiconductor chip;

a metal layer electrically coupled to the semiconductor chip;

an array of solder balls coupled to the metal layer; and

a front side protect material directly contacting the metal layer and laterally surrounding a portion of at least a plurality of solder balls, the front side protect material configured to become fluid during solder reflow.

2 . The semiconductor device of claim 1 , wherein the front side protect material laterally surrounds at least 20% of each solder ball.

3 . The semiconductor device of claim 1 , wherein the front side protect material directly contacts each solder ball.

4 . The semiconductor device of claim 1 , wherein the front side protect material comprises b-stageable material.

5 . The semiconductor device of claim 1 , wherein the front side protect material comprises one of an epoxy material, a thermoset material, and a thermoplastic material.

6 . The semiconductor device of claim 1 , wherein the front side protect material comprises photo-structurable material.

7 . A semiconductor device package comprising:

a semiconductor die;

at least one redistribution line electrically coupled to the semiconductor die;

at least one solder ball electrically coupled to the at least one redistribution line; and

means for supporting the solder ball at an interface of the at least one solder ball and the at least one redistribution line.

8 . The semiconductor device package of claim 7 , wherein the means comprises front side protect material configured to become fluid during solder reflow.

9 . The semiconductor device package of claim 8 , wherein the front side protect material laterally surrounds at least 20% of the at least one solder ball.

10 . The semiconductor device package of claim 8 , wherein the front side protect material comprises b-stageable material.

11 . The semiconductor device package of claim 8 , wherein the front side protect material comprises one of an epoxy material, a thermoset material, and a thermoplastic material.

12 . An integrated circuit comprising:

a semiconductor die;

at least one redistribution line electrically coupled to the semiconductor die;

at least one solder ball electrically coupled to the at least one redistribution line;

a resist material directly contacting the at least one redistribution line; and

a front side protect material directly contacting the resist material and laterally surrounding a portion of the at least one solder ball, the front side protect material configured to become fluid during solder reflow.

13 . The integrated circuit of claim 12 , wherein the front side protect material laterally surrounds at least 20% of the at least one solder ball.

14 . The integrated circuit of claim 12 , wherein the front side protect material directly contacts the at least one solder ball.

15 . The integrated circuit of claim 12 , wherein the front side protect material comprises a photo-structurable, b-stageable material.

16 . The integrated circuit of claim 12 , wherein the front side protect material comprises one of an epoxy material, a thermoset material, and a thermoplastic material.

17 . The integrated circuit of claim 12 , wherein the resist material comprises one of parylene and an organic protection material.

18 . A method for fabricating a semiconductor device, the method comprising:

providing a preprocessed wafer;

applying a front side protect material layer over the preprocessed wafer;

applying solder material to the preprocessed wafer; and

softening the solder material and the front side protect material until an array of solder balls is formed.

19 . The method of claim 18 , further comprising:

removing portions of the front side protect material layer to expose portions of the preprocessed wafer prior to applying the solder material.

20 . The method of claim 18 , further comprising:

fabricating at least one metal layer over the preprocessed wafer prior to applying the front side protect material layer.

21 . The method of claim 18 , wherein softening the solder material and the front side protect material comprises softening the solder material and the front side protect material until the array of solder balls is formed such that the front side protect material laterally surrounds at least 20% of each solder ball.

22 . The method of claim 18 , wherein softening the solder material and the front side protect material comprises softening the solder material and the front side protect material until the array of solder balls is formed such that the front side protect material directly contacts each solder ball.

23 . The method of claim 18 , wherein applying the front side protect material comprises applying a b-stageable material.

24 . The method of claim 18 , wherein applying the front side protect material comprises applying one of an epoxy material, a thermoset material, and a thermoplastic material.

25 . A method for fabricating an integrated circuit, the method comprising:

providing a preprocessed wafer;

fabricating at least one redistribution layer coupled to the preprocessed wafer;

applying a resist material layer over the at least one redistribution layer;

applying a front side protect material layer over the resist material layer;

applying solder material to the at least one redistribution layer; and

softening the solder material and the front side protect material until an array of solder balls is formed.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2022
From: INTEL DEUTSCHLAND GMBH
To: INTEL CORPORATION
Reel/Frame 061356/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2012
From: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH
To: INTEL MOBILE COMMUNICATIONS GMBH
Reel/Frame 027556/0709 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 18, 2012
From: INFINEON TECHNOLOGIES AG
To: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH
Reel/Frame 027548/0623 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 2, 2008
From: MEYER, THORSTEN; SEZI, RECAI; BRUNNBAUER, MARKUS
To: INFINEON TECHNOLOGIES AG
Reel/Frame 021028/0447 →