IP Library Patent Application 12131691
Patent Application
App. No. 12/131,691

MULTI-STRAND SUBSTRATE FOR BALL-GRID ARRAY ASSEMBLIES AND METHOD

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Patent No.
US None
App. No.
12/131,691
Abstract

A multi-strand printed circuit board substrate for ball-grid array (BGA) assemblies includes a printed wiring board ( 11 ) having a plurality of BGA substrates ( 12 ) arranged in N rows ( 14 ) and M columns ( 16 ) to form an N by M array. N and M are greater than or equal to 2 and the size of the N by M array is selected such that each of the plurality of BGA substrates ( 12 ) maintains a planarity variation less than approximately 0.15 mm (approximately 6 mils). The printed wiring board ( 11 ) has a thickness ( 26 ) sufficient to minimize planarity variation and to allow a manufacturer to use automated assembly equipment without having to use support pallets or trays.

Claims (41)

1 .- 20 . (canceled)

21 . A method for assembling ball-grid array (BGA) packages, comprising the steps of:

providing a plurality of BGA substrates arranged in an N by M array within a printed circuit board having a thickness, wherein N and M are greater than or equal to 2, each of the plurality of BGA substrates having a plurality of bond posts on one side and a plurality of contact pads on an opposite side, wherein the thickness of the printed circuit board is selected such that the printed circuit board can be subjected to automated assembly processes without using a metal support pallet;

attaching a semiconductor die to each of the plurality of BGA substrates, the semiconductor die having at least one bond pad;

encapsulating the semiconductor die with an encapsulant;

curing the encapsulant;

attaching conductive solder balls to each of the plurality of contact pads; and

dividing the N by M array into separate BGA packages.

22 . The method of claim 21 , wherein the step of encapsulating the semiconductor die includes encapsulating with an encapsulant having a thermal coefficient of expansion close to that of the semiconductor die and the printed circuit board.

23 . The method of claim 21 , wherein the step of providing the plurality of BGA substrates arranged in the N by M array within the printed circuit board includes providing the plurality of BGA substrates within the printed circuit board having a plurality of stress-relief slots at various locations within the printed circuit board.

24 . The method of claim 21 , wherein the step of providing the plurality of BGA substrates arranged in the N by M array within the printed circuit board includes providing the plurality of BGA substrates within the printed circuit board having a thickness greater than approximately 0.5 mm.

25 . The method of claim 21 , wherein the step of providing the plurality of BGA substrates arranged in the N by M array within the printed circuit board includes providing the plurality of BGA substrates within the printed circuit board having a width on an order of 63 mm.

26 . The method of claim 21 , wherein the step of providing the plurality of BGA substrates arranged in the N by M array within the printed circuit board includes providing the plurality of BGA substrates within the printed circuit board having a length in a range from approximately 187 mm to 212 mm.

27 . The method of claim 21 further comprising the steps of:

bonding conductive wires to the plurality of bond pads and the plurality of bond posts after the step of attaching the semiconductor die; and

marking the BGA packages after the step of over-molding the semiconductor die.

28 . The method of claim 21 , wherein the step of curing the encapsulant further includes protecting the plurality of contact pads from foreign matter contamination.

29 . The method of claim 21 further comprising, after attaching conductive solder balls to each of the plurality of contact pads, removing at least some corrosive residue from the printed circuit board.

30 . The method of claim 23 , wherein at least one of the plurality of stress-relief slots is of a different size from another of the plurality of stress-relief slots.

31 . The method of claim 21 , wherein the printed circuit board further comprises a plurality of alignment holes on only one side of the printed circuit board.

32 . The method of claim 21 , wherein the printed circuit board further comprises a plurality of alignment holes on both sides of the printed circuit board.

33 . The method of claim 21 , wherein the at least one bond pad comprises copper or gold plated copper.

34 . The method of claim 21 , wherein the at least one bond pad is a solid metallization area.

35 . The method of claim 21 , wherein the at least one bond pad is a patterned metallization area having a specific geometric shape, wherein the specific geometric shape is a cross or Union Jack.

36 . The method of claim 21 , wherein attaching conductive solder balls to each of the plurality of contact pads comprises attaching the conductive solder balls at room temperature.

37 . The method of claim 36 further comprising, after attaching the conductive solder balls, reflowing the conductive solder balls using an automated solder reflow process.

38 . A ball-grid array (BGA) package, comprising:

a BGA substrate formed from BGA substrates arranged in a N by M array within a printed circuit board having a thickness, wherein N and M are greater than or equal to 2, the BGA substrate having a plurality of bond posts and a plurality of contact pads, wherein a size of the N by M array is selected such that the BGA substrate maintains a planarity variation less than approximately 0.15 mm after assembly;

at least one semiconductor die coupled to the BGA substrate using the plurality of bond posts; and

an encapsulant formed over the at least one semiconductor die.

39 . The BGA package of claim 38 further comprising solder balls attached to each of the plurality of contact pads.

40 . A ball-grid array (BGA) package, comprising:

a BGA substrate divided from BGA substrates arranged in a N by M array within a printed circuit board having a thickness, wherein N and M are greater than or equal to 2, the BGA substrate having a plurality of bond posts and a plurality of contact pads, wherein the thickness of the printed circuit board is selected such that the BGA substrate maintains a planarity variation less than approximately 0.15 mm after assembly;

at least one semiconductor die coupled to the BGA substrate using the plurality of bond posts; and

an encapsulant formed over the at least one semiconductor die.

41 . The BGA package of claim 40 further comprising solder balls attached to each of the plurality of contact pads.

42 . A ball-grid array (BGA) package, comprising:

a BGA substrate divided from BGA substrates arranged in a N by M array within a printed circuit board having a thickness, wherein N and M are greater than or equal to 2, the BGA substrate having a plurality of bond posts and a plurality of contact pads, wherein a size of the N by M array and the thickness of the printed circuit board is selected such that the BGA substrate maintains a planarity variation less than approximately 0.15 mm after assembly;

at least one semiconductor die coupled to the BGA substrate using the plurality of bond posts; and

an encapsulant formed over the at least one semiconductor die.

43 . The BGA package of claim 42 further comprising solder balls attached to each of the plurality of contact pads.

Assignments (28)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
PATENT RELEASE Recorded Aug 17, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 039707/0471 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NORTH STAR INNOVATIONS INC.
Reel/Frame 037694/0264 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0719 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Mar 15, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 024085/0001 →
SECURITY AGREEMENT Recorded Sep 24, 2008
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 021570/0449 →