IP Library Granted Patent US 8,084,352
Granted Patent B2
US 8,084,352 · App. 12/131,968 · Granted Dec 27, 2011

Method of manufacturing semiconductor device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,084,352
App. No.
12/131,968
Granted
Dec 27, 2011
Kind
B2
Abstract

A high-density N-type diffusion layer 116 formed in a separation area 115 makes it possible to reduce a collector current flowing through a parasitic NPN transistor 102 . Thus, a normal CMOS process can be used to provide a driving circuit and a data line driver which make it possible to improve resistance to possible noise occurring between adjacent terminals, while controlling a chip size.

Claims (26)

1. A method of manufacturing a semiconductor device having at least one wiring layer therein and an air gap in any wiring layer area to reduce inter-wire capacity, the method comprising:

when forming the wiring layer in which an air gap is formed,

forming a first insulating film on a semiconductor substrate or a lower wiring layer;

forming a plurality of wires in an upper part of the first insulating film;

forming a first cap film on the wires;

forming a mask pattern on an air gap non-forming area of the first insulating film and the first cap film;

at least partly etching the first cap film and the first insulating film through the mask pattern to form a gap in an air gap forming area;

removing the mask pattern;

forming a second cap film on at least an area in which the first cap film was etched; and

depositing a second insulating film on the gap, the first cap film, and the second cap film to form the air gap from the gap in the air gap forming area.

2. The method of manufacturing the semiconductor device according to claim 1 , wherein the wires comprise a copper film or a copper alloy film.

3. The method of manufacturing the semiconductor device according to claim 1 , wherein each of the first cap film and the second cap film is any of a Co film, a Co alloy film, an Ni film, an Ni alloy film, a W film, a W alloy film, and a Cu alloy film.

4. The method of manufacturing the semiconductor device according to claim 1 , wherein the first insulating film is any of an SiO.sub.2 film, an SiOC film, an SiOF film, a BCB film, and an SiLK film.

5. A method of manufacturing a semiconductor device having at least one wiring layer therein and an air gap in any wiring layer area to reduce inter-wire capacity, the method comprising:

when forming the wiring layer in which an air gap is formed,

forming a first insulating film on a semiconductor substrate or a lower wiring layer;

forming a plurality of wires in an upper part of the first insulating film;

forming a first cap film on the wires;

forming a mask pattern on an air gap non-forming area of the first insulating film and the first cap film;

etching entirely away the first cap film through the mask pattern to form a gap in an air gap forming area;

removing the mask pattern;

forming a second cap film on the wiring layer in at least an area in the air gap forming area in which the first cap film was etched entirely away; and

depositing a second insulating film on the gap, and the second cap film to form the air gap.

6. The method of manufacturing the semiconductor device according to claim 5 , wherein the wires comprise a copper film or a copper alloy film.

7. The method of manufacturing the semiconductor device according to claim 5 , wherein the second cap film is any of a Co film, a Co alloy film, an Ni film, an Ni alloy film, a W film, a W alloy film, and a Cu alloy film.

8. The method of manufacturing the semiconductor device according to claim 5 , wherein the first insulating film is any of an SiO.sub.2 film, an SiOC film, an SiOF film, a BCB film, and an SiLK film.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2015
From: PANASONIC CORPORATION
To: PANNOVA SEMIC, LLC
Reel/Frame 036065/0273 →