IP Library Granted Patent US 7,830,704
Granted Patent B1
US 7,830,704 · App. 12/134,802 · Granted Nov 9, 2010

Compact magnetic random access memory cell with slotted bit line and method of manufacturing same

Assignee: Magsil Corporation
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Quick Facts
Patent No.
US 7,830,704
App. No.
12/134,802
Granted
Nov 9, 2010
Kind
B1
Abstract

Embodiments of the invention provide compact magnetic random access memory cell, comprising a word line; a bit line comprising a slot formed therein; a magnetic storage element disposed between the word line and the bit line; an access transistor located below the bit line and aligned with the slot therein; and a conductor passing through the slot in the bit line electrically connect the magnetic storage element to the access transistor.

Claims (19)

1. A magnetic random access memory cell, comprising:

a word line;

a bit line comprising a slot formed therein;

a magnetic storage element disposed between the word line and the bit line;

an access transistor located below the bit line and aligned with the slot therein; and

a conductor passing through the slot in the bit line electrically connect the magnetic storage element to the access transistor; wherein an area of the cell is 3.75 F.

2. The magnetic random access memory cell of claim 1 , wherein the magnetic storage element comprises a Magnetic Tunnel Junction (MTJ).

3. The magnetic storage random access memory cell of claim 1 , wherein the conductor is not laterally offset relative to the magnetic storage element.

4. The magnetic random access memory cell of claim 1 , wherein the conductor is defined at least in part by a conductive via formed in a dielectric material.

5. A memory device, comprising:

an array of magnetic random access memory cells arranged in grid a word line, wherein

each magnetic random access memory cell comprises:

a bit line comprising a slot formed therein;

a magnetic storage element disposed between the word line and the bit line;

an access transistor located below the bit line and aligned with the slot therein; and

a conductor passing through the slot in the bit line electrically connect the magnetic storage element to the access transistor; wherein an area of the cell is 3.75 F.

6. The memory device of claim 5 , wherein the magnetic storage element comprises a Magnetic Tunnel Junction (MTJ).

7. The memory device of claim 5 , wherein the conductor is not laterally offset relative to the magnetic storage element.

8. The memory device of claim 5 , wherein the conductor is defined at least in part by a conductive via formed in a dielectric material.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 11, 2014
From: MAGSIL CORPORATION
To: III HOLDINGS 1, LLC
Reel/Frame 032657/0837 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2008
From: MANI, KRISHNAKUMAR
To: MAGSIL CORPORATION
Reel/Frame 021248/0865 →
Continuity (1)
Provisional Application 6094220500 · Jun 6, 2007