Integrated circuit die with logically equivalent bonding pads
View Patent ↗An integrated circuit (IC) die includes two bonding pads, that share a common logical function, such as signal input or signal output, separated by the width of the die, and preferably on opposite sides of the die. System-in-package devices are produced by steps including directly electrically connecting one or the other bonding pad to bonding pads of other, functionally different IC dies, with the bonding pads of the other IC dies, to which are connected bonding pads of common logical function of the IC dies of the present invention, being functionally identical but geometrically different. Multichip package devices are produced by stacking the IC dies of the present invention with other IC dies and directly electrically connecting one or the other bonding pad to different bonding pads of the other IC dies.
1. A method of producing system-in-package devices, comprising the steps of:
(a) providing two substantially identical first integrated circuit dies, each said first integrated circuit die having a plurality of bonding pads, wherein two of said bonding pads share a common logical function of a common electrical circuit, such that coupling to either one of said two bonding pads accesses the common logical function;
(b) providing a second integrated circuit die that is functionally different from said first integrated circuit dies, said second integrated circuit die having a plurality of bonding pads;
(c) providing a third integrated circuit die that is functionally identical to said second integrated circuit die, said third integrated circuit die having a plurality of bonding pads, said bonding pads of said third integrated circuit die having a different geometric arrangement than said bonding pads of said second integrated circuit die;
(d) producing a first system-in-package device by steps including directly electrically connecting a first of said two bonding pads, of one of said first integrated circuit dies, that share said common logical function, to one of said bonding pads of said second integrated circuit die; and
(e) producing a second system-in-package device, that is separate from the first system-in-package device, by steps including directly electrically connecting a second of said two bonding pads, of another of said first integrated circuit dies, that share said common logical function, to one of said bonding pads of said third integrated circuit die, wherein said one bonding pad of said third integrated circuit die is functionally identical to but geometrically different than said one bonding pad of said second integrated circuit die.
2. The method of claim 1 , wherein said first integrated circuit dies are memory dies and said second and third integrated circuit dies are processor dies.
3. The method of claim 1 , wherein said first integrated circuit dies are processor dies and said second and third integrated circuit dies are memory dies.
4. A method of producing multichip package devices, comprising the steps of:
(a) providing a plurality of substantially identical first integrated circuit dies, each said first integrated circuit die having a plurality of bonding pads, wherein two of said bonding pads share a common logical function of a common electrical circuit, such that coupling to either one of said two bonding pads accesses the common logical function;
(b) providing a plurality of second integrated circuit dies, each said second integrated circuit die having a plurality of bonding pads;
(c) producing a first multichip package device by steps including:
(i) mounting one of said first integrated circuit dies in a stacked relationship with one of said second integrated circuit dies, and
(ii) directly electrically connecting a first of said two bonding pads of said one first integrated circuit die that share said common logical function to a first of said bonding pads of said one second integrated circuit die; and
(d) producing a second multichip package device by steps including:
(i) mounting another of said first integrated dies in a stacked relationship with another of said second integrated circuit dies, and
(ii) directly electrically connecting a second of said two bonding pads of said other first integrated circuit die that share said common logical function to a second of said bonding pads of said other second integrated circuit die
wherein the produced first multichip package is separate from the produced second multichip package device.