Granted Patent B1

US 8,085,020 · App. 12/139,231 · Granted Dec 27, 2011

Abstract

Claims (39)

1. A switching voltage regulator operable to regulate a voltage supplied to system circuitry, the switching voltage regulator comprising:

a ring oscillator operable to generate an oscillator signal representing a gate speed of a reference circuit in the system circuitry, wherein the ring oscillator comprises a plurality of delay elements connected in series;

a frequency generator operable to generate a reference signal representing a target gate speed of the reference circuit, wherein a frequency of the reference signal is based on a divider value;

a comparator operable to compare the oscillator signal to the reference signal;

switching circuitry operable to charge a charging element in response to the comparison; and

control circuitry operable to adjust the number of delay elements in the ring oscillator and the divider value of the frequency generator to generate hysteresis in the comparison.

2. The switching voltage regulator as recited in claim 1 , wherein the control circuitry comprises a flip-flop.

3. The switching voltage regulator as recited in claim 1 , wherein the control circuitry is further operable to select between a first number of delay elements and a second number of delay elements and select between a first divider value and a second divider value.

4. The switching voltage regulator as recited in claim 3 , wherein the control circuitry is further operable to toggle between a first number of delay elements and a second number of delay elements and toggle between a first divider value and a second divider value.

5. The switching voltage regulator as recited in claim 4 , wherein the control circuitry is further operable to toggle between the first divider value and the second divider value and toggle between the first number of delay elements and the second number of delay elements when a frequency of the oscillator signal falls below a frequency of the reference signal.

6. The switching voltage regulator as recited in claim 1 , wherein the control circuitry comprises a first multiplexer for selecting one of a plurality of delay elements and a second multiplexer for selecting one of a plurality of divider values.

7. The switching voltage regulator as recited in claim 3 , wherein:

the second number of delay elements effectively divides a frequency of the oscillator signal by a third divider value; and

the second divider value is different from the third divider value, thereby generating a hysteretic threshold in the comparison.

8. The switching voltage regulator as recited in claim 1 , wherein the switching circuitry is operable to charge the charging element while a frequency of the reference signal is above a frequency of the oscillator signal.

9. A method of operating a switching voltage regulator operable to regulate a voltage supplied to system circuitry, the switching voltage regulator comprising:

a ring oscillator operable to generate an oscillator signal representing a gate speed of a reference circuit in the system circuitry, wherein the ring oscillator comprises a plurality of delay elements connected in series; and

a frequency generator operable to generate a reference signal representing a target gate speed of the reference circuit, wherein a frequency of the reference signal is based on a divider value;

the method comprising:

comparing the oscillator signal to the reference signal;

charging a charging element in response to the comparison; and

adjusting the number of delay elements in the ring oscillator and the divider value of the frequency generator to generate hysteresis in the comparison.

10. The method as recited in claim 9 , further comprising selecting between a first number of delay elements and a second number of delay elements and selecting between a first divider value and a second divider value.

11. The method as recited in claim 10 , further comprising toggling between a first number of delay elements and a second number of delay elements and toggling between a first divider value and a second divider value.

12. The method as recited in claim 11 , further comprising toggling between the first divider value and the second divider value and toggling between the first number of delay elements and the second number of delay elements when a frequency of the oscillator signal falls below a frequency of the reference signal.

13. The method as recited in claim 9 , further comprising selecting one of a plurality of delay elements and selecting one of a plurality of divider values.

14. The method as recited in claim 10 , wherein:

the second number of delay elements effectively divides a frequency of the oscillator signal by a third divider value; and

the second divider value is different from the third divider value, thereby generating a hysteretic threshold in the comparison.

15. The method as recited in claim 9 , further comprising charging the charging element while a frequency of the reference signal is above a frequency of the oscillator signal.

16. A disk drive comprising:

a disk;

a head actuated over the disk; and

disk control circuitry including a switching voltage regulator comprising:

a ring oscillator operable to generate an oscillator signal representing a gate speed of a reference circuit in the disk control circuitry, wherein the ring oscillator comprises a plurality of delay elements connected in series;

a frequency generator operable to generate a reference signal representing a target gate speed of the reference circuit, wherein a frequency of the reference signal is based on a divider value;

a comparator operable to compare the oscillator signal to the reference signal;

switching circuitry operable to charge a charging element in response to the comparison; and

control circuitry operable to adjust the number of delay elements in the ring oscillator and the divider value of the frequency generator to generate hysteresis in the comparison.

Assignments (8)