Universal logic gate utilizing nanotechnology
View Patent ↗A universal logic gate apparatus is disclosed, which include a plurality of self-assembling chains of nanoparticles having a plurality of resistive connections, wherein the plurality of self-assembling chains of nanoparticles comprise resistive connects utilized to create A plasticity mechanism is also provided, which is based on a plasticity rule for creating stable connections from the plurality of self-assembling chains of nanoparticles for use with the universal, reconfigurable logic gate. The plasticity mechanism can be based, for example, on a 2-dimensional binary input data stream, depending upon design considerations. A circuit is also associated with the plurality of self-assembling chains of nanoparticles, wherein the circuit provides a logic bypass that implements a flip-cycle for second-level logic. Additionally, an extractor logic gate is associated with the plurality of self-assembling chains of nanoparticles, wherein the extractor logic gate provides logic functionalities.
1. A discrete-state synapse apparatus, said apparatus comprising:
a plurality of conducting channels under the influence of a plasticity rule, where each channel among said plurality of conducting channels is capable of being in two or more states with different electrical resistances thereof;
wherein at least one transition between conducting states of said plurality of conducting channels is susceptible to thermal energy fluctuations;
wherein at least one transition between conducting states of said plurality channels is susceptible to an applied voltage bias; and
at least one differential pair of channels of said plurality of conducting channels forming two parallel resistive connections comprising two conducting pathways.
2. The apparatus of claim 1 wherein said at least one differential pair of channels is formed from a configuration of an input electrode and two output electrodes.
3. The apparatus of claim 2 wherein a state of said apparatus is measured by applying an electric potential on said input electrode while measuring the differential electric potential on said two output electrodes.
4. The apparatus of claim 2 wherein a state of said apparatus is reinforced by applying a positive feedback between said two output electrodes and inverting an electric potential polarity of an input potential.
5. The apparatus of claim 1 wherein said at least one differential pair of channels is formed from a configuration of two input electrodes and one output electrode.
6. The apparatus of claim 5 wherein a state of said apparatus is measured by applying a differential electric potential on the input electrodes while measuring the electric potential on said two output electrodes.
7. The apparatus of claim 5 wherein a state of said apparatus is reinforced by applying a positive feedback on said two output electrodes and inverting an electric potential polarity of said input electrode.
8. The apparatus of claim 1 wherein said differential pair of channels is formed from a configuration of two input electrodes and two output electrodes.
9. The apparatus of claim 8 wherein a state of said apparatus is measured by applying a differential electric potential on said two input electrodes while measuring a differential electric potential on said two output electrodes.
10. The apparatus of claim 8 wherein a state of said apparatus is reinforced by applying a positive feedback between said two output electrodes and inverting an electric potential polarity of said two input electrodes.
11. The apparatus of claim 1 wherein relative temporal widths of an evaluate phase and a feedback phase are dynamically adjusted.
12. A neural node apparatus, comprising:
a plurality of discrete-state synapses sharing a same electrode, said discrete-state synapses under the influence of a plasticity rule;
wherein a state of said neural node apparatus is measured by applying an electric potential on at least one input electrode of at least one discrete-state synapse among said plurality of discrete-synapses, while measuring a differential electric potential on a shared output electrode thereof; and
wherein a state of said neural node apparatus is reinforced by applying a positive feedback on at least one output electrode while inverting an electric potential polarity of said at least one input electrode of said at least one discrete-state synapse so as to facilitate a transfer of discrete-state synaptic states to a node state of said neural node apparatus.