IP Library Granted Patent US 7,821,142
Granted Patent B2
US 7,821,142 · App. 12/145,022 · Granted Oct 26, 2010

Intermediate semiconductor device structures

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Quick Facts
Patent No.
US 7,821,142
App. No.
12/145,022
Granted
Oct 26, 2010
Kind
B2
Abstract

An alignment mark mask element protects an underlying alignment mark during subsequent processing of a fabrication substrate. The alignment mark mask element is formed concurrent with formation of a photomask from a dual-tone photoresist that exhibits a pattern reversal upon exposure to an energy level. A portion of the dual-tone photoresist above the alignment mark is exposed to an energy sufficient to reverse a positive tone resist to a negative tone, which remains above the alignment mark after developing. The remainder of the dual-tone photoresist is exposed through a reticle at a lesser energy level and patterned to define aperture locations of a photomask for formation of semiconductor device features. In addition, a photomask for use on a fabrication substrate and an intermediate semiconductor device are disclosed. Methods of forming a photomask and an intermediate semiconductor device structure are also disclosed.

Claims (32)

1. An intermediate semiconductor device structure, comprising:

an exposed dual-tone photoresist material overlying a substrate having at least one alignment mark thereon, the exposed dual-tone photoresist material comprising:

a first energy-exposed portion exhibiting a first tone and having a plurality of apertures formed therethrough; and

a second energy-exposed portion abutting the first energy-exposed portion and exhibiting a second, different tone.

2. The intermediate semiconductor device structure of claim 1 , wherein the first tone is positive and the second tone is negative.

3. The intermediate semiconductor device structure of claim 1 , wherein the first energy-exposed portion exhibits a greater thickness than the second energy-exposed portion.

4. An intermediate semiconductor device structure, comprising:

a fabrication substrate comprising a plurality of semiconductor die locations thereon;

at least one alignment mark on the fabrication substrate; and

a photomask comprising:

an exposed dual-tone photoresist material comprising:

a first energy-exposed portion exhibiting a first tone and having a plurality of apertures formed therethrough; and

a second energy-exposed portion abutting the first energy-exposed portion, exhibiting a second, different tone and overlying the at least one alignment mark, the second energy-exposed portion extending to a peripheral edge of at least one of the plurality of apertures.

5. The intermediate semiconductor device structure of claim 4 , wherein the first tone is positive and the second, different tone, is negative.

6. The intermediate semiconductor device structure of claim 4 , wherein the first energy-exposed portion exhibits a greater thickness than the second energy-exposed portion.

7. A photomask for a semiconductor device structure in process, comprising:

an exposed dual-tone photoresist material comprising:

a first energy-exposed portion exhibiting a first tone and having a plurality of apertures formed therethrough; and

a second energy-exposed portion abutting the first energy-exposed portion extending to a peripheral edge of the first energy-exposed portion and exhibiting a second, different tone, wherein the second energy-exposed portion is positioned to substantially shield only an underlying alignment mark on a fabrication substrate without shielding portions of an underlying material adjacent to the underlying alignment mark.

8. The photomask of claim 7 , wherein at least one of the plurality of apertures extends to a peripheral edge of the second energy-exposed portion.

9. An intermediate semiconductor device structure, comprising:

a fabrication substrate comprising a plurality of semiconductor die locations thereon;

at least one alignment mark on the fabrication substrate; and

a photomask comprising:

an exposed dual-tone photoresist material comprising:

a first energy-exposed portion exhibiting a first tone and having a plurality of apertures formed therethrough; and

a second energy-exposed portion abutting the first energy-exposed portion and extending to a peripheral edge of at least one of the plurality of apertures, the second energy-exposed portion exhibiting a second, different tone and overlying the at least one alignment mark, wherein the second energy-exposed portion substantially shields the at least one alignment mark without shielding portions of a semiconductor device feature abutting a peripheral edge of the at least one alignment mark.

10. An intermediate semiconductor device structure, comprising:

a photoresist material overlying a substrate and comprising:

a first energy-exposed portion surrounding at least one alignment mark in the substrate and exhibiting a first tone; and

a second energy-exposed portion abutting the first energy-exposed portion and extending to a peripheral edge of the first energy-exposed portion, the second energy-exposed portion overlying the at least one alignment mark and exhibiting a second, different tone.

11. The intermediate semiconductor device structure of claim 10 , wherein a boundary of at least one of a plurality of apertures is positioned substantially at a peripheral edge of the at least one alignment mark.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →