Semiconductor device and method for manufacturing semiconductor device
View Patent ↗A semiconductor device includes a first metal foil, an insulating sheet mounted on an upper surface of the first metal foil main, at least one second metal foil mounted on the insulating sheet, at least one solder layer mounted on the at least one second metal foil, and at least one semiconductor element mounted on the at least one second metal foil through the at least one solder layer. The at least one semiconductor has a thickness of 50 μm or greater and less than 100 μm.
1. A semiconductor device, comprising:
a first metal foil;
an insulating sheet mounted on an upper surface of the first metal foil;
at least one second metal foil mounted on the insulating sheet;
at least one solder layer mounted on the at least one second metal foil;
at least one semiconductor element mounted on the at least one second metal foil through the at least one solder layer, said at least one semiconductor having a thickness of 50 μm or greater and less than 100 μm; and
an oxide film selectively formed on an outer peripheral portion of an upper surface of the at least one second metal foil.
2. A semiconductor device, comprising:
a first metal foil;
an insulating sheet mounted on an upper surface of the first metal foil;
at least one second metal foil mounted on the insulating sheet;
at least one solder layer mounted on the at least one second metal foil;
at least one semiconductor element mounted on the at least one second metal foil through the at least one solder layer, said at least one semiconductor having a thickness of 50 μm or greater and less than 100 μm; and
a wetting suppressing layer formed on a selected portion of an upper face of the at least one second metal foil to suppress wetting by solder of the at least one solder layer,
wherein the wetting suppressing layer comprises a resist pattern.
3. A semiconductor device according to claim 2 , wherein a material of the at least one solder layer is tin-silver solder or tin-antimony solder.
4. A semiconductor device according to claim 2 , wherein the resist pattern surrounds the at least one solder layer.