Method of forming isolation structure for semiconductor integrated circuit substrate
View Patent ↗Isolation regions for semiconductor substrates include dielectric-filled trenches and field oxide regions. Protective caps of dielectric materials dissimilar from the dielectric materials in the main portions of the trenches and field oxide regions may be used to protect the structures from erosion during later process steps. The top surfaces of the isolation structures are coplanar with the surface of the substrate. Field doping regions may be formed beneath the field oxide regions. To meet the demands of different devices, the isolation structures may have varying widths and depths.
1. A method of forming an isolation structure in a semiconductor substrate comprising:
depositing a first mask layer on the substrate;
depositing a second mask layer on the first mask layer;
patterning the second mask layer to form a first opening having a first width;
etching the first mask layer through the first opening to form a second opening having a width substantially equal to the first width;
etching the substrate through the second opening to form a first trench having a width substantially equal to the first width;
removing the second mask layer;
depositing a third mask layer over a remaining portion of the first mask layer;
patterning the third mask layer to form a third opening having a second width, the second width being unequal to the first width;
etching the first mask layer through the third opening to form a fourth opening having a width substantially equal to the second width;
etching the substrate through the fourth opening to form a second trench having a width substantially equal to the second width;
depositing a first dielectric material so as to completely fill the first and second trenches; and
removing a portion of the first dielectric material such that surfaces of the first dielectric material in the first and second trenches, respectively, are located at a first level, the first level being no higher than a plane substantially coplanar with a surface of the substrate, wherein removing a portion of the first dielectric material comprises removing a portion of the first dielectric material such that surfaces of the first dielectric material in the first and second trenches, respectively, are located below a plane defined by the surface of the substrate, thereby forming a first recess in the first trench and a second recess in the second trench.
2. The method of claim 1 comprising;
depositing a second dielectric material in the first and second recesses; and
removing a portion of the second dielectric material such that surfaces of the second dielectric material in the first and second trenches are substantially coplanar with the surface of the substrate, thereby forming a first protective cap in the first trench and a second protective cap in the second trench.
3. The method of claim 2 wherein the second dielectric material is relatively more resistant to removal by normal semiconductor processes as compared with the first dielectric material.
4. The method of claim 3 wherein the second dielectric material comprises one or more materials selected from the group consisting of silicon nitride and polyimide.
5. The method of claim 3 wherein the first dielectric comprises one or more materials from the group consisting of the doped and undoped silicon oxides and silicate glasses.
6. The method of claim 5 wherein the first dielectric material comprises borophosphosilicate glass.