IP Library Granted Patent US 7,920,188
Granted Patent B2
US 7,920,188 · App. 12/150,697 · Granted Apr 5, 2011

Method and apparatus for processing a pixel signal

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Quick Facts
Patent No.
US 7,920,188
App. No.
12/150,697
Granted
Apr 5, 2011
Kind
B2
Abstract

An NchMOS transistor Q 71 on the input side of a current mirror 70 is made function as a voltage operating-point setting portion so that a pixel signal line potential (voltage of a horizontal signal line 20 ) would be constantly stable nearly at the GND. Then, an amplification factor and linearity become good in an amplification transistor in the solid imaging device 3. A current copier 90 is made function as a current sampling portion so as to receive a signal current IIN of the solid imaging device 3 through the current mirror 70 to carry out sampling of a pixel signal in a resetting period in the shape of current component as the pixel signal is. Calculating differential between a current component in a detecting period and an offset current, which is the current component in a resetting period in sampling, allows an offset component included in the pixel signal to be removed and only pure signal Isig to be picked up at an output terminal Iout, so that the FPN restraining function can be fulfilled.

Claims (4)

1. A pixel signal processing apparatus comprising; a voltage operating-point setting portion for maintaining a voltage of a horizontal pixel signal output line substantially at a constant voltage while receiving a pixel signal output through the horizontal pixel signal line as a current signal; a current sampling portion and circuitry for determining a differential between a sampled reset signal level and a detecting period signal level, wherein the current sampling portion includes at least a current mirror circuit and wherein said current sampling portion further comprises a current copier circuit.

2. A pixel signal processing apparatus comprising: a voltage operating-point setting portion for maintaining a voltage of a horizontal pixel signal output line substantially at a constant voltage while receiving a pixel signal output through the horizontal pixel signal line as a current signal; a current sampling portion and circuitry for determining a differential between a sampled reset signal level and a detecting period signal level, wherein the current sampling portion includes at least a current mirror circuit and wherein said current sampling portion further comprises a second current mirror circuit and a capacitative element for holding the reset signal.

3. The pixel signal processing apparatus according to claim 1 , wherein said current sampling portion contains only one passive circuit element whose primary function is charge storage.

4. The pixel signal processing apparatus according to claim 2 , wherein said current sampling portion contains only one capacitative circuit element.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2016
From: SONY CORPORATION
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 040419/0001 →