IP Library Granted Patent US 7,969,256
Granted Patent B2
US 7,969,256 · App. 12/153,786 · Granted Jun 28, 2011

Signal transmission circuit and signal transmission system with reduced reflection

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,969,256
App. No.
12/153,786
Granted
Jun 28, 2011
Kind
B2
Abstract

A signal transmission circuit includes a transmitting circuit for outputting a transmitting signal to a transmission line, a parallel circuit including a capacitor and a first resistance connected between an output terminal of the transmitting circuit and the transmission line, and a series circuit including an inductor and a second resistance connected between an output side of the parallel circuit and a ground.

Claims (34)

1. A signal transmission circuit, comprising:

a transmitting circuit for outputting a transmitting signal to a transmission line;

a parallel circuit comprising a capacitor and a first resistance connected between an output terminal of the transmitting circuit and the transmission line; and

a series circuit comprising an inductor and a second resistance connected between an output side of the parallel circuit and a ground,

wherein the transmitting circuit satisfies a relation: tr≧CZ or tf≧CZ, where tr and tf are a rise time and a fall time, respectively, of an output waveform of the transmitting circuit, Z is a characteristic impedance of the transmission line, and C is an electrostatic capacitance of the capacitor, or

wherein the transmitting circuit satisfies a relation tr≧L/R 2 or tf≧L/R 2 , where a rise time and a fall time of an output waveform of the transmitting circuit are tr and tf, respectively, a resistance value of the second resistance is R 2 and an inductance of the inductor is L.

2. A signal transmission circuit, comprising:

a transmitting circuit for outputting a differential signal from first and second output terminals thereof to a differential signal transmission line;

a first parallel circuit comprising a first capacitor and a first resistance connected between the first output terminal of the transmitting circuit and the differential signal transmission line;

a first series circuit comprising a first inductor and a second resistance connected between an output side of the first parallel circuit and a ground;

a second parallel circuit comprising a second capacitor and a third resistance connected between the second output terminal of the transmitting circuit and the differential transmission line; and

a second series circuit comprising a second inductor and a fourth resistance connected between an output side of the second parallel circuit and the ground.

3. The signal transmission circuit according to claim 2 , wherein the signal transmission circuit satisfies a relation: tr≧CZ or tf≧CZ, where tr and tf are a rise time and a fall time, respectively, of an output waveform of the transmitting circuit, Z is a characteristic impedance of the differential signal transmission line, and C is an electrostatic capacitance of the first capacitor and the second capacitor.

4. The signal transmission circuit according to claim 2 , wherein the signal transmission circuit satisfies a relation: tr≧L/R 2 or tf≧L/R 2 , where a rise time and a fall time of an output waveform of the transmitting circuit are tr and tf, respectively, a resistance value of the second resistance and the fourth resistance is R 2 and an inductance of the first inductor and the second inductor is L.

5. A signal transmission system, comprising:

a transmission line comprising a power source ground pair transmission line and a ground line;

a transmitting circuit for outputting a transmitting signal to the transmission line;

a receiving circuit for receiving a signal from the transmission line;

a parallel circuit comprising a capacitor and a first resistance connected between an output terminal of the transmitting circuit and the transmission line; and

a series circuit comprising an inductor and a second resistance connected between an output side of the parallel circuit and a ground,

wherein the transmission line comprises a stacked pair transmission line that a signal line is paired with a ground line, the signal line and the ground line having a belt-shaped wiring pattern.

6. The signal transmission system according to claim 5 , wherein the stacked pair transmission line comprises a wiring width w that is approximately equal to a clearance d between adjacent stacked pairs of wiring.

7. A signal transmission system, comprising:

a differential signal transmission line for transmitting a differential signal;

a transmitting circuit for outputting the differential signal from first and second output terminals thereto to the differential signal transmission line;

a receiving circuit for receiving a signal from the differential signal transmission line;

a first parallel circuit comprising a first capacitor and a first resistance connected between the first output terminal of the transmitting circuit and the differential signal transmission line;

a first series circuit comprising a first inductor and a second resistance connected between an output side of the first parallel circuit and a ground;

a second parallel circuit comprising a second capacitor and a third resistance connected between the second output terminal of the transmitting circuit and the differential signal transmission line; and

a second series circuit comprising a second inductor and a fourth resistance connected between an output side of the second parallel circuit and the ground.

8. The signal transmission system according to claim 7 , wherein the differential signal transmission line comprises a clearance of 2d or more between adjacent pairs of wiring where d is a clearance between one pair of wirings.

9. The signal transmission system according to claim 7 , wherein the signal transmission system satisfies a relation: tr≧CZ or tf≧CZ, where tr and tf are a rise time and a fall time, respectively, of an output waveform of the transmitting circuit, Z is a characteristic impedance of the differential signal transmission line, and C is an electrostatic capacitance of the first capacitor and the second capacitor.

10. The signal transmission system according to claim 7 , wherein the signal transmission system satisfies a relation: tr≧L/R 2 or tf≧L/R 2 , where a rise time and a fall time of an output waveform of the transmitting circuit are tr and tf, respectively, a resistance value of the second resistance and the fourth resistance is R 2 and an inductance of the first inductor and the second inductor is L.

11. The signal transmission system according to claim 7 , wherein the differential signal transmission line comprises a power source ground pair transmission line.

Assignments (8)
CHANGE OF NAME Recorded Aug 12, 2021
From: FUJI XEROX CO., LTD.
To: FUJIFILM BUSINESS INNOVATION CORP.
Reel/Frame 058287/0056 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 3, 2019
From: LAPIS SEMICONDUCTOR CO., LTD.
To: FUJI XEROX CO., LTD.; RENESAS ELECTRONICS CORPORATION; IBIDEN CO., LTD.; KABUSHIKI KAISHA TOSHIBA; OTSUKA, KANJI; AKIYAMA, YUTAKA
Reel/Frame 049077/0592 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 3, 2019
From: KYOCERA CORPORATION
To: FUJI XEROX CO., LTD.; RENESAS ELECTRONICS CORPORATION; IBIDEN CO., LTD.; KABUSHIKI KAISHA TOSHIBA; OTSUKA, KANJI; AKIYAMA, YUTAKA
Reel/Frame 049077/0449 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE KYOCERA CORPORATION FROM ASSIGNEES PREVIOUSLY RECORDED ON REEL 021429 FRAME 0358. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 27, 2018
From: OTSUKA, KANJI; AKIYAMA, YUTAKA
To: FUJI XEROX CO., LTD.; RENESAS ELECTRONICS CORPORATION; IBIDEN CO., LTD.; KABUSHIKI KAISHA TOSHIBA; KANJI OTSUKA; YUTAKA AKIYAMA
Reel/Frame 049153/0179 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE FUJITSU SEMICONDUCTOR LIMITED FROM ASSIGNEES PREVIOUSLY RECORDED ON REEL 024922 FRAME 0155. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 27, 2018
From: OTSUKA, KANJI; AKIYAMA, YUTAKA
To: FUJI XEROX CO., LTD.; RENESAS ELECTRONICS CORPORATION; IBIDEN CO., LTD.; KABUSHIKI KAISHA TOSHIBA; KANJI OTSUKA; YUTAKA AKIYAMA
Reel/Frame 049153/0203 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 27, 2018
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJI XEROX CO., LTD.; RENESAS ELECTRONICS CORPORATION; IBIDEN CO., LTD.; KABUSHIKI KAISHA TOSHIBA; KANJI OTSUKA; YUTAKA AKIYAMA
Reel/Frame 049073/0623 →
CHANGE OF ADDRESS OF ASSIGNEE Recorded Dec 17, 2018
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 049031/0236 →
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →