Simulation system to verify multicycle path based on circuit operational specification and circuit design specification

1. A simulation system for performing simulation of an operation of a circuit, the simulation system comprising:

a particular signal substituting section for making, in the simulation, an output signal of a first flipflop or an input signal of a second flipflop be a particular signal indicating neither high level nor low level during a period which is 1 cycle shorter than a specified clock cycle number of a multicycle path which has been specified in advance; and

an output section for outputting information corresponding to whether or not a signal at an output terminal of the second flipflop or at part of the circuit located in a subsequent stage of the output terminal of the second flipflop, which has been specified in advance, is made to be the particular signal,

wherein said simulation is based on circuit information indicating a circuit configuration of the circuit including the first flipflop and the second flipflop to which the output signal of the first flipflop is input without passing any other flipflop therebetween.

2. The simulation system of claim 1 , wherein the output section is so configured to display a waveform of the signal at the output terminal of the second flipflop or at part of the circuit located in a subsequent stage of the output terminal of the second flipflop, which has been specified in advance, on a display.

3. The simulation system of claim 1 , wherein the output section is so configured to output information indicating whether or not, in the simulation, a signal at the output terminal of the second flipflop or at part of the circuit located in a subsequent stage of the output terminal of the second flipflop, which has been specified in advance, is made to be the particular signal.

4. The simulation system of claim 1 , wherein the output section is so configured to output information indicating a largest number of ones of a plurality of different specified clock cycle numbers specified in advance with which, in the simulation, the signal at the output terminal of the second flipflop or at part of the circuit located in a subsequent stage of the output terminal of the second flipflop, which has been specified in advance, is not made to be the particular signal.

5. A simulation system for performing simulation of an operation of a circuit, the simulation system comprising:

a particular signal substituting section for treating, in the simulation, an output signal of a first flipflop as an independent signal on each of signal paths from the first flipflop to a plurality of second flipflops; and

making each output signal of the first flipflop be a particular signal which is neither high level nor low level during a period which starts from a timing of change of the output signal of the first flipflop and is 1 cycle shorter than a specified clock cycle number which has been specified in advance for each of the paths; and

an output section for outputting information with respect to each of the output signals of the first flipflop, which corresponds to whether or not a signal at an output terminal of the second flipflop or at part of the circuit located in a subsequent stage of the output terminal of the second flipflop, which has been specified in advance, is made to be the particular signal,

wherein said simulation is based on circuit information indicating a circuit configuration of the circuit including the first flipflop and the plurality of second flipflops to which an output signal of the first flipflop is input without passing any other flipflop therebetween.

6. The simulation system of claim 5 , further comprising a circuit information conversion section for converting circuit information indicating signal lines in the circuit to be simulated which are branched from a data output terminal of the first flipflop and connected to data input terminals of the second flipflops, respectively, into circuit information indicating independent signal lines from one another,

wherein the particular signal substituting section is so configured to make, in the simulation of the circuit of which the circuit information is converted, each output signal of the first flipflop be the particular signal during a period which starts from a timing of change of the output signal of the first flipflop and is 1 cycle shorter than a specified clock cycle number which has been specified in advance for each of the path.

7. The simulation system of claim 5 , wherein the output section is so configured to display, with respect to each output signal of the first flipflop, a waveform of the signal at the output terminal of the second flipflop or at part of the circuit located in a subsequent stage of the output terminal of the second flipflop, which has been specified in advance, on a display.

8. The simulation system of claim 5 , wherein the output section is so configured to output, with respect to each output signal of the first flipflop, information indicating whether or not, in the simulation, the signal at an output terminal of the second flipflop or at the part of the circuit located in a subsequent stage of the output terminal of the second flipflop, which has been specified in advance, is made to be the particular signal.

9. The simulation system of claim 5 , wherein the output section is so configured to output, with respect to each output signal of the first flipflop, information indicating a largest number of ones of a plurality of different specified clock cycle numbers specified in advance with which, in the simulation, the signal at an output terminal of the second flipflop or at the part of the circuit located in a subsequent stage of the output terminal of the second flipflop, which has been specified in advance, is not made to be the particular signal.