Method for producing semiconductor chip, and field effect transistor and method for manufacturing same

1. A method of manufacturing a field-effect transistor, comprising the steps of:

manufacturing a semiconductor piece by:

(i) stacking a sacrificial layer and a semiconductor layer on a substrate in this order, and repeating the stacking so as to form the semiconductor layers on the substrate, the number of the semiconductor layers being at least two,

(ii) etching part of the sacrificial layers and part of the semiconductor layers together so as to divide the sacrificial layers into first pieces and the semiconductor layers into second pieces, thereby forming a plurality of multilayered structures on the substrate, each of the plurality of multilayered structures including the first pieces of the sacrificial layers and the second pieces of the semiconductor layers, and

(iii) removing the first pieces of the sacrificial layers in the multilayered structures so as to separate the second pieces of the semiconductor layers from the substrate;

forming a droplet of a dispersion medium at a tip of a capillary that is filled with the dispersion medium;

bringing the droplet into contact with the semiconductor piece disposed on a liquid-repellent surface, thereby causing the semiconductor piece to be included in the droplet;

disposing the droplet that includes the semiconductor piece on a lyophilic region of a gate insulating film and allowing the dispersion medium to evaporate so that the semiconductor piece is disposed on the gate insulating film; and

connecting a source electrode and a drain electrode to the semiconductor piece.

2. The manufacturing method according to claim 1 , wherein in the step (iii), the first pieces are removed by wet etching.

3. The manufacturing method according to claim 1 , further comprising

a step of lowering the resistance of both ends of the second piece before the step (iii).

4. The manufacturing method according to claim 1 ,

wherein the step (i) is steps of stacking the sacrificial layer, the semiconductor layer, and an insulating layer in this order, and repeating the stacking, and

the step (ii) is a step of etching part of the sacrificial layers, part of the semiconductor layers, and part of the insulating layers so as to divide the sacrificial layers into the first pieces, the semiconductor layers into the second pieces and the insulating layers into third pieces, thereby forming the plurality of multilayered structures on the substrate, each of the plurality of multilayered structures including the first pieces, the second pieces and the third pieces.

5. The manufacturing method according to claim 1 ,

wherein the step (i) is steps of stacking the sacrificial layer, the semiconductor layer, an insulating layer, and a conductive layer in this order, and repeating the stacking, and

the step (ii) is a step of etching part of the sacrificial layers, part of the semiconductor layers, part of the insulating layers, and part of the conductive layers so as to divide the sacrificial layers into the first pieces, the semiconductor layers into the second pieces, the insulating layers into third pieces and the conductive layers into fourth pieces, thereby forming the plurality of multilayered structures on the substrate, each of the plurality of multilayered structures including the first pieces, the second pieces, the third pieces and the fourth pieces.

6. The manufacturing method according to claim 1 ,

wherein the sacrificial layer is made of a crystal.

7. The manufacturing method according to claim 6 ,

wherein the sacrificial layer is made of SiGe crystal, and

the semiconductor layer is made of crystalline silicon.

8. The manufacturing method according to claim 7 ,

wherein the sacrificial layers are removed using an etchant obtained by mixing nitric acid, hydrofluoric acid and water.

9. The manufacturing method according to claim 1 ,

wherein the sacrificial layer is an organic polymer layer, and

in the step (i), the semiconductor layer is stacked by bonding the semiconductor layer using the organic polymer layer.

10. The manufacturing method according to claim 1 ,

wherein the semiconductor layer is made of a crystal.

11. The manufacturing method according to claim 1 ,

wherein the semiconductor layer is made of a single crystal.

12. The manufacturing method according to claim 1 ,

wherein the sacrificial layers are formed of a material having a higher etching rate than the semiconductor layers.