IP Library Granted Patent US 8,120,157
Granted Patent B2
US 8,120,157 · App. 12/163,877 · Granted Feb 21, 2012

Printed wiring board structure, electronic component mounting method and electronic apparatus

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Quick Facts
Patent No.
US 8,120,157
App. No.
12/163,877
Granted
Feb 21, 2012
Kind
B2
Abstract

According to one embodiment, a printed wiring board structure comprises a printed wiring board having first and second component mounting surfaces at front and back sides thereof, respectively, each for mounting a semiconductor package loading a semiconductor chip loaded on a substrate as a mounting component, a first semiconductor package mounted on the first component mounting surface, and a second semiconductor package mounted on the second component mounting surface, wherein the first and second semiconductor packages have a positional relationship such that the substrates are partially overlapped via the printed wiring board, and the semiconductor chips are not overlapped.

Claims (14)

1. A printed wiring board structure comprising:

a printed wiring board having first and second component mounting surfaces at front and back sides thereof, respectively, to mount first and second semiconductor packages loading first and second semiconductor chips as mounting components,

wherein the first semiconductor package is mounted on the first component mounting surface, the first semiconductor package comprising the first semiconductor chip,

wherein the second semiconductor package is mounted on the second component mounting surface, the second semiconductor package comprising the second semiconductor chip, and

wherein the first and second semiconductor packages have a positional relationship such that at least a portion of an edge of the first semiconductor chip borders at least a portion of an edge of the second semiconductor chip via the printed wiring board, but that the first and second semiconductor chips are not overlapped.

2. The structure of claim 1 , wherein the first semiconductor package is soldered with a first solder ball array on the first component mounting surface, and the second semiconductor package is soldered with a second solder ball array on the second component mounting surface.

3. The structure of claim 1 , the first and second semiconductor chips are mounted on first and second substrates, respectively, wherein each of the first and second substrates has a flat rectangular shape, and wherein there are first gluing areas between each corner portion of the substrate of the first semiconductor package and the first component mounting surface, and there are second gluing areas between each corner portion of the substrate of the second semiconductor package and the second component mounting surface, that are made using adhesive material.

4. An electronic apparatus comprising:

an electronic apparatus body; and

a circuit board structure built in the electronic apparatus body, the circuit board structure comprising,

a printed wiring board having first and second component mounting surfaces at front and back sides thereof, respectively, for mounting first and second semiconductor packages loading first and second semiconductor chips as mounting components,

wherein the first semiconductor package is mounted on the first component mounting surface, the first semiconductor package comprising the first semiconductor chip,

wherein the second semiconductor package is mounted on the second component mounting surface, the second semiconductor package comprising the second semiconductor chip,

wherein the first and second semiconductor packages have a positional relationship such that at least a portion of an edge of the first semiconductor chip borders at least a portion of an edge of the second semiconductor chip via the printed wiring board, but that the first and second semiconductor chips are not overlapped.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 15, 2019
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA CLIENT SOLUTIONS CO., LTD.
Reel/Frame 048720/0635 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2008
From: TAKIZAWA, MINORU
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 021517/0360 →