Circuit with a voltage dependent resistor for controlling an on/off state of a transistor

1. A circuit comprising:

a depletion mode upper transistor with a second electrode coupled to a first electrode of a lower transistor;

a first voltage supply node coupled to a first electrode of the depletion mode upper transistor;

a second voltage supply node coupled to a second electrode of the lower transistor;

a load node disposed between the second electrode of the depletion mode upper transistor and the first electrode of the lower transistor;

an upper driver transistor selectively coupling a gate electrode of the depletion mode upper transistor to an upper drive voltage node, the upper driver transistor having a control electrode coupled to an upper switched voltage supply circuit;

a lower switched voltage supply circuit coupled to a gate electrode of the lower transistor; and

a voltage dependent resistor coupled across the gate electrode and second electrode of the depletion mode upper transistor, wherein in use when the lower transistor and upper driver transistor are in a non-conductive state, a potential difference across the voltage dependent resistor is sufficiently small so as to place the depletion mode upper transistor into a conductive state and when the lower transistor and upper driver transistor are in a conductive state, the potential difference across the voltage dependent resistor provides a bias voltage to the gate electrode of the depletion mode upper transistor that has a negative potential sufficient to place the depletion mode upper transistor into a non-conductive state.

2. A circuit as claimed in claim 1 , wherein the voltage dependent resistor is in a low resistance state when a voltage across the gate electrode and second electrode of the depletion mode upper transistor is below 1 Volt and the voltage dependent resistor is in a high resistance state when a voltage across the gate electrode and second electrode of the depletion mode upper transistor is greater than 1.5 volts.

3. A circuit as claimed in claim 1 , wherein the upper drive voltage node is connected to a voltage source that supplies a negative voltage of at least minus 2 volts.

4. A circuit as claimed in claim 1 , wherein the second voltage supply node is coupled to ground.

5. A circuit as claimed in claim 1 , wherein the circuit is a left sub-circuit of an H-bridge amplifier, the H-bridge amplifier also having a right sub-circuit that is identical to the left sub-circuit.

6. A circuit as claimed in claim 1 , wherein a potential difference between the second voltage supply node and the upper drive voltage node is sufficient to place the depletion mode upper transistor into the non-conductive state.

7. A circuit as claimed in claim 1 , wherein the voltage dependent resistor comprises at least two series connected depletion mode Field Effect transistors, a first one of the series connected depletion mode Field Effect transistors has a gate electrode and second electrode directly coupled together and a first electrode coupled to a second electrode of a second one of the series connected depletion mode Field Effect transistors, and the second one of the series connected depletion mode Field Effect transistors has a first electrode coupled to the second node of the depletion mode upper transistor, and wherein a gate electrode of the second one of the series connected depletion mode Field Effect transistors is directly coupled to the second electrode of the first one of the series connected depletion mode Field Effect transistors.

8. A circuit as claimed in claim 1 , wherein the voltage dependent resistor comprises at least one depletion mode Field Effect transistor having a gate electrode and a second electrode directly coupled together and a first electrode of the depletion mode Field Effect transistor is coupled to the second electrode of the depletion mode upper transistor.

9. A circuit as claimed in claim 1 , wherein the voltage dependent resistor comprises a gateless depletion mode Field Effect transistor with a first electrode of the gateless depletion mode Field Effect transistor is-coupled to the second electrode of the depletion mode upper transistor.

10. A circuit as claimed in claim 1 , wherein the voltage dependent resistor comprises at least two series connected depletion mode Field Effect transistors a first one of the series connected depletion mode Field Effect transistors is a gateless Field Effect transistors with a first electrode coupled to a second electrode of a second one of the series connected depletion mode Field Effect transistors, and the second one of the series connected depletion mode Field Effect transistors has a first electrode coupled to the second electrode of the depletion mode upper transistor, and wherein a gate electrode of the second one of the series connected depletion mode Field Effect transistors is directly coupled to a second electrode of the first one of the series connected depletion mode Field Effect transistors.

11. A circuit as claimed in claim 5 , wherein the circuit operates as an RF amplifier coupled to a controller that maps a modulation signal to provide a ternary signaling to the circuit.

12. A circuit as claimed in claim 11 , wherein the ternary signaling drives the upper switched voltage supply circuit and the lower switched voltage supply circuit of both sub-circuits into one of three states, wherein a first of the states results in a load current flowing from the first voltage supply node through depletion mode upper transistor of the right sub-circuit, through the load and band pass filters and through the lower transistor of the left sub-circuit to ground, and wherein a second of the states results in a load current flowing from the first voltage supply node through depletion mode upper transistor of the left sub-circuit, through the load and band pass filters and through the lower transistor of the right sub-circuit to ground, and wherein a third of the states allows energy stored in the band pass filters to discharge through the lower transistor of both the left and right sub-circuit.

13. A circuit as claimed in claim 11 , wherein the ternary signaling drives the upper switched voltage supply circuit and the lower switched voltage supply circuit of both sub-circuits into one of three states, wherein a first of the states results in a load current flowing from the first voltage supply node through depletion mode upper transistor of the right sub-circuit, through the load and band pass filters and through the lower transistor of the left sub-circuit to ground, and wherein a second of the states results in a load current flowing from the first voltage supply node through depletion mode upper transistor of the left sub-circuit, through the load and band pass filters and through the lower transistor of the right sub-circuit to ground, and wherein a third of the states results in a energy stored in the band pass filters to discharge through the depletion mode upper transistor of both the left and right sub-circuit.

14. An H-bridge circuit comprising two sub-circuits coupled to each other by a load network across a respective load node of each of the sub-circuits, each sub-circuit of the two sub-circuits comprising:

a depletion mode upper transistor with a second electrode coupled to a first electrode of a lower transistor, wherein the load node of the sub-circuit is disposed between the second electrode of the depletion mode upper transistor and the first electrode of a lower transistor;

a first voltage supply node coupled to a first electrode of the depletion mode upper transistor;

a second voltage supply node coupled to a second electrode of the lower transistor;

an upper driver transistor selectively coupling a gate electrode of the depletion mode upper transistor to an upper drive voltage node, the upper driver transistor having a control electrode coupled to an upper switched voltage supply circuit;

a lower switched voltage supply circuit coupled to a gate electrode of the lower transistor; and

a voltage dependent non-linear resistor coupled across the gate electrode and second electrode of the depletion mode upper transistor, wherein in use when the lower transistor and upper driver transistor are in a non-conductive state, a potential difference across the voltage dependent non-linear resistor is sufficiently small so as to place the depletion mode upper transistor into a conductive state and when the lower transistor and upper driver transistor are in a conductive state the potential difference across the voltage dependent non-linear resistor provides a bias voltage to the gate electrode of the depletion mode upper transistor that has a negative potential sufficient to place the upper transistor into a non-conductive state.

15. An H-bridge circuit as claimed in claim 14 , wherein the voltage dependent resistor is in a low resistance state when a voltage across the gate electrode and second electrode of the depletion mode upper transistor is below 1 Volt and the voltage dependent non-linear resistor is in a high resistance state when a voltage across the gate electrode and second electrode of the depletion mode upper transistor is greater than 1.5 volts.

16. An H-bridge circuit as claimed in claim 14 , wherein a potential difference between the second voltage supply node and the upper drive voltage node is sufficient to place the depletion mode upper transistor into the non-conductive state.

17. An H-bridge circuit as claimed in claim 14 , wherein the circuit operates as an RF amplifier coupled to a controller maps a modulation signal to provide a ternary signaling to the circuit.

18. An H-bridge circuit as claimed in claim 17 , wherein the ternary signaling drives the upper switched voltage supply circuit and the lower switched voltage supply circuit of both sub-circuits into one of three states, wherein a first of the states results in a load current flowing from the first voltage supply node through depletion mode upper transistor of the right one of the sub-circuits, through the load and band pass filters, and through the lower transistor of a left one of the sub-circuits to ground, and wherein a second of the states results in a load current flowing from the first voltage supply node through depletion mode upper transistor of the left one of the sub-circuits, through the load and band pass filters and through the lower transistor of the right one of the sub-circuits to ground, and wherein a third of the states results in a energy stored in the band pass filters to discharge through the lower transistor of both sub-circuits.

19. An H-bridge circuit as claimed in claim 17 , wherein the ternary signaling drives the upper switched voltage supply circuit and the lower switched voltage supply circuit of both sub-circuits into one of three states, wherein a first of the states results in a load current flowing from the first voltage supply node through depletion mode upper transistor of right one of the sub-circuits, through the load and band pass filters and through the lower transistor of a left one of the sub-circuits to ground, and wherein a second of the states results in a load current flowing from the first voltage supply node through depletion mode upper transistor of the left one of the sub-circuits, through the load and band pass filters and through the lower transistor of the right one of the sub-circuits to ground, and wherein a third of the states results in a energy stored in the band pass filters to discharge through the depletion mode upper transistor of both sub-circuits.

20. A circuit comprising:

a depletion mode upper transistor with a second electrode coupled to a first electrode of a lower transistor;

a first voltage supply node coupled to a first electrode of the depletion mode upper transistor;

a second voltage supply node coupled to a second electrode of the lower transistor;

an output node disposed between the second electrode of the depletion mode upper transistor and the first electrode of a lower transistor;

an upper driver transistor having a first electrode coupled to a gate electrode of the depletion mode upper transistor, a second electrode coupled to an upper drive voltage node and a gate electrode coupled to a upper switched voltage supply circuit;

a lower switched voltage supply circuit coupled to a gate electrode of the lower transistor; and

a voltage dependent resistor coupled across the gate electrode and second electrode of the depletion mode upper transistor, wherein the voltage dependent non-linear resistor is in a low resistance state when a voltage across the gate electrode and second electrode of the depletion mode upper transistor is below 1 Volt and the voltage dependent non-linear resistor is in a high resistance state when a voltage across the gate electrode and second electrode of the depletion mode upper transistor is greater than 1.5 volts.

21. A circuit as claimed in claim 20 , wherein the circuit is a left sub-circuit of an H-bridge amplifier, the H-bridge amplifier also having a right sub-circuit that is identical to the left sub-circuit.

22. A circuit as claimed in claim 20 , wherein a potential difference between the second voltage supply node and the upper drive voltage node is sufficient to place the depletion mode upper transistor into the non-conductive state.

23. A circuit as claimed in claim 20 , wherein the circuit operates as an RF amplifier coupled to a controller that maps a modulation signal to provide a ternary signaling to the circuit.

24. A circuit as claimed in claim 23 , wherein the ternary signaling drives the upper switched voltage supply circuit and the lower switched voltage supply circuit of both sub-circuits into one of three states, wherein a first of the states results in a load current flowing from the first voltage supply node through a depletion mode upper transistor of the right sub-circuit, through the load and band pass filters and through the lower transistor of the left sub-circuit to ground, and wherein a second of the states results in a load current flowing from the first voltage supply node through a depletion mode upper transistor of the left sub-circuit, through the load and band pass filters and through the lower transistor of the right sub-circuit to ground, and wherein a third of the states results in a energy stored in the band pass filters to discharge through the lower transistor of both the left and right sub-circuit.

25. A circuit as claimed in claim 23 , wherein the ternary signaling drives the upper switched voltage supply circuit and the lower switched voltage supply circuit of both sub-circuits into one of three states, wherein a first of the states results in a load current flowing from the first voltage supply node through a depletion mode upper transistor of the right sub-circuit, through the load and band pass filters and through the lower transistor of the left sub-circuit to ground, and wherein a second of the states results in a load current flowing from the first voltage supply node through a depletion mode upper transistor of the left sub-circuit, through the load and band pass filters and through the lower transistor of the right sub-circuit to ground, and wherein a third of the states results in a energy stored in the band pass filters to discharge through the depletion mode upper transistor of both the left and right sub-circuit.