Semiconductor device and semiconductor device manufacturing method

1. A manufacturing method of a semiconductor device, comprising:

forming a first interlayer insulating film over a semiconductor substrate;

forming, on said first interlayer insulating film, a first resist mask exposing a small-diameter part formation region where said small-diameter part is formed;

etching said first interlayer insulating film of said small-diameter part formation region to form a first capacitor contact hole having a bottom face exposed at a first conductive member;

removing said first resist mask;

forming, on said first interlayer insulating film, a second resist mask exposing a large-diameter part formation region where said large-diameter part on said first interlayer insulating film is formed;

a second etching step of etching said first interlayer insulating film of said large-diameter part formation region to form a second capacitor contact hole;

removing said second resist mask;

forming said contact plug by filling said first capacitor contact hole and said second capacitor contact hole with a conductive material so as to form said small-diameter part and said large-diameter part;

providing a second interlayer insulating film on said first interlayer insulating film and said large-diameter part, and etching said second interlayer insulating film provided on said large-diameter part, thereby forming a connection hole that penetrates through said second interlayer insulating film, and has a bottom face at least part of which said large-diameter part is exposed at, an outer diameter of the bottom face of said connection hole being smaller than the outer diameter of said large-diameter part; and

forming a second conductive member that uses said large diameter part exposed at the bottom face of said connection hole as a connection face to said contact plug,

wherein:

said first interlayer insulating film includes a plug interlayer insulating film, and a bit-line interlayer insulating film provided on said plug interlayer insulating film, and a plurality of bit-lines are formed between said plug interlayer insulating film and said bit-line interlayer insulating film;

said first capacitor contact hole is formed between adjacent bit-lines; and

an external shape of said second capacitor contact hole is formed so as to be larger than a distance between said adjacent bit-lines.

2. The semiconductor device manufacturing method according to claim 1 , wherein said bit-lines are covered with a bit-line insulating film, and said second capacitor contact hole is formed by using said bit-line insulating film as an etching stopper.

3. The semiconductor device manufacturing method according to claim 2 , wherein said bit-line insulating film is formed by a silicon nitride film, and said first interlayer insulating film is formed by a silicon oxide film.

4. The semiconductor device manufacturing method according to claim 1 , further comprising:

forming a plurality of MOS transistors on the semiconductor substrate before forming said plug interlayer insulating film, said contact plug being connected to one of source/drain electrodes of corresponding one of said MOS transistors.

5. The semiconductor device manufacturing method according to claim 4 , wherein each of said bit lines is formed so as to connect to the other of source/drain electrodes of corresponding one of said MOS transistors.

6. A manufacturing method of a semiconductor device, comprising:

forming a first interlayer insulating film over a semiconductor substrate;

forming, on said first interlayer insulating film, a first resist mask exposing a small-diameter part formation region where said small-diameter part is formed;

etching said first interlayer insulating film of said small-diameter part formation region to form a first capacitor contact hole having a bottom face exposed at a first conductive member;

removing said first resist mask;

forming, on said first interlayer insulating film, a second resist mask exposing a large-diameter part formation region where said large-diameter part on said first interlayer insulating film is formed;

a second etching step of etching said first interlayer insulating film of said large-diameter part formation region to form a second capacitor contact hole;

removing said second resist mask;

forming said contact plug by filling said first capacitor contact hole and said second capacitor contact hole with a conductive material so as to form said small-diameter part and said large-diameter part;

providing a second interlayer insulating film on said first interlayer insulating film and said large-diameter part, and etching said second interlayer insulating film provided on said large-diameter part, thereby forming a connection hole that penetrates through said second interlayer insulating film, and has a bottom face at least part of which said large-diameter part is exposed at, an outer diameter of the bottom face of said connection hole being smaller than the outer diameter of said large-diameter part; and

forming a second conductive member that uses said large diameter part exposed at the bottom face of said connection hole as a connection face to said contact plug,

wherein said connection hole is a cylinder in which the inner diameter of a bottom face of said connection hole is smaller than an outer diameter of said large-diameter part; and said second conductive member is formed along an inner wall of said cylinder and is used as a lower electrode of a capacitor.