Output circuit
View Patent ↗A reference voltage is applied from a reference voltage generating circuit to the non-inverting input terminal of an amplifier for supplying a drive voltage to the gate terminal of an NMOS transistor, and the output voltage appearing at the source terminal of the NMOS transistor is divided by a resistor pair and applied to the inverting input terminal of the amplifier. The voltage obtained by adding a voltage equal to or higher than the voltage for sufficiently driving the NMOS transistor to the output voltage appearing at the source terminal of the NMOS transistor is generated by a charge pump circuit and supplied to the amplifier as a power supply voltage. With this configuration, the drive voltage for the NMOS transistor is suppressed to the required minimum voltage while the drive voltage is obtained securely. The power consumption in the amplifier can thus be suppressed.
1. An output circuit comprising:
an output transistor having a first main terminal to which an input voltage is input, a second main terminal from which an output voltage is output and a control terminal, wherein a drive voltage supplied to the control terminal is equal to or higher than the drive threshold voltage of the output transistor, the drive voltage being generated in response to a potential of the second main terminal, whereby an impedance between the first main terminal and the second main terminal can be controlled;
a control drive circuit for supplying said drive voltage to the control terminal of said output transistor to control the output voltage from the second main terminal of said output transistor; and
a charge pump circuit, configured so as to output a predetermined voltage being equal to or higher than said drive threshold voltage; said predetermined voltage being generated in response to the potential of the second main terminal of said output transistor, for supplying a power supply voltage to the control drive circuit, the power supply voltage being obtained by adding the predetermined voltage to the output voltage from the second main terminal of said output transistor.
2. The output circuit according to claim 1 , wherein said output transistor is an NMOS transistor or an NPN transistor.
3. The output circuit according to claim 1 , wherein
said control drive circuit has a differential amplifier, wherein
the output voltage from the second main terminal of said output transistor or a voltage with reference to the output voltage from the second main terminal of said output transistor is input to an input terminal of said differential amplifier, a reference voltage or a voltage to be amplified is input to another input terminal of said differential amplifier, and an output voltage of said differential amplifier is supplied to the control terminal of said output transistor as said drive voltage.
4. The output circuit according to claim 1 , wherein
said charge pump circuit comprises:
a DC power supply for generating a predetermined voltage,
a first capacitor,
a first switching circuit for charging said first capacitor from said DC power supply,
a second capacitor, one terminal of which is connected to the second main terminal of said output transistor, and
a second switching circuit for charging said second capacitor from said first capacitor, wherein
a voltage appearing at another terminal of said second capacitor is supplied to said control drive circuit.
5. The output circuit according to claim 4 , wherein the predetermined voltage generated by said DC power supply is set at a voltage equal to or higher than the drive threshold voltage of said output transistor.
6. An output circuit comprising:
an output transistor having a first main terminal to which an input voltage is input, a second main terminal from which an output voltage is output and a control terminal, wherein a drive voltage supplied to the control terminal is equal to or higher than the drive threshold voltage of the output transistor, the drive voltage being generated in response to a potential of the second main terminal, whereby an impedance between the first main terminal and the second main terminal can be controlled;
a control drive circuit for supplying said drive voltage to the control terminal of said output transistor to control the output voltage from the second main terminal of said output transistor; and
a charge pump circuit, configured so as to output a voltage with reference to the potential of the second main terminal of said output transistor, for carrying out control so that a power supply voltage supplied to said control drive circuit is the voltage obtained by adding a predetermined voltage being equal to or higher than said drive threshold voltage to the output voltage from the second main terminal of said output transistor.
7. The output circuit according to claim 6 , wherein said output transistor is an NMOS transistor or an NPN transistor.
8. The output circuit according to claim 6 , wherein
said control drive circuit has a differential amplifier, wherein
the output voltage from the second main terminal of said output transistor or a voltage with reference to the output voltage from the second main terminal of said output transistor is input to an input terminal of said differential amplifier, a reference voltage or a voltage to be amplified is input to another input terminal of said differential amplifier, and the output voltage of said differential amplifier is supplied to the control terminal of said output transistor as said drive voltage.
9. The output circuit according to claim 6 , wherein
said charge pump circuit comprises:
a DC power supply for generating a predetermined voltage,
a first capacitor,
a first switching circuit for charging said first capacitor from said DC power supply,
a second capacitor, one terminal of which is connected to the first main terminal of said output transistor, and
a second switching circuit for charging said second capacitor from said first capacitor, wherein
a voltage appearing at another terminal of said second capacitor is supplied to said control drive circuit.
10. The output circuit according to claim 9 , wherein the predetermined voltage generated by said DC power supply is set at the voltage obtained by adding a voltage equal to or higher than the drive threshold voltage of said output transistor to the output voltage from the second main terminal of said output transistor and by subtracting the input voltage to the first main terminal of said output transistor from the sum of the addition.
11. The output circuit according to claim 9 , wherein
said DC power supply has a differential amplifier, a transistor and a third capacitor, wherein
the voltage appearing at the other terminal of said second capacitor or a voltage with reference to the voltage appearing at the other terminal of said second capacitor is input to an input terminal of said differential amplifier, the reference voltage is input to another input terminal of said differential amplifier, and an output voltage of said differential amplifier is supplied to the control terminal of said transistor,
a first main terminal of said transistor is connected to the first main terminal of said output transistor, a second main terminal of said transistor is connected to a first terminal of said third capacitor, a second terminal of said third capacitor is grounded, and
said predetermined voltage is output from across the terminals of said third capacitor.