Semiconductor device and manufacturing method thereof
View Patent ↗A method for improving productivity when manufacturing a semiconductor device. A lower electrode, insulating films, an upper electrode and insulating films are formed on a semiconductor substrate in a sensor region. A cavity is formed between the insulator films above the lower electrode. The lower electrode, insulating film, the cavity and insulating film, and an upper electrode form a variable capacity sensor. The cavity is formed by etching a sacrificial pattern between the insulation films by way of a hole formed in a pair of insulation films. Other than in the above sensor region, a dummy lower electrode and four insulating films are formed on the TEG region on the semiconductor substrate; and a dummy cavity is formed between a pair of insulation films above the lower electrode however no conductive layer on the same layer as the upper electrode is formed on the dummy cavity.
1. A manufacturing method for a semiconductor device whose main surface contains a sensor region formed from multiple sensor cells, comprising:
(a) a process for forming a first insulating film on the semiconductor substrate;
(b) a process for forming a sacrificial pattern for forming a cavity on the first insulating film;
(c) a process for forming a second insulating film so as to cover the sacrificial pattern on the first insulating film;
(d) a process for forming a first conducting layer patterned on the second insulating film;
(e) a process for forming a third insulating film so as to cover the first conducting layer on the second insulating film;
(f) a process for forming an opening so as to expose a portion of the sacrificial pattern on the second and the third insulating films;
(g) a process for forming a cavity between the first insulating film and the second insulating film by selectively etching the sacrificial pattern by way of the opening; and
(h) a process for forming a fourth insulating film so as to block the opening on the third insulating film after the (g) process,
wherein each of the multiple sensor cells in the sensor region includes:
a cavity; and
a first electrode formed on the cavity and made from the first conducting layer,
wherein in the (b) process among the sacrificial patterns, a first sacrificial pattern is formed on the sensor region, and among the sacrificial patterns, a second sacrificial pattern is formed on a first region other than the sensor region,
wherein in the (f) process, a first opening is formed so as to expose a portion of the first sacrificial pattern, and a second opening is formed so as to expose a portion of the second sacrificial pattern, on the second and the third insulating films, and
wherein in the (g) process, the etched state of the second sacrificial pattern on the first region is observed, after selectively etching the first and the second sacrificial patterns by way of the first opening and the second opening.
2. A manufacturing method for a semiconductor device according to claim 1 , wherein, in the (d) process, among the second sacrificial patterns, no first conducting layer is formed above the position of the sacrificial pattern farthest from the second opening.
3. A manufacturing method for a semiconductor device according to claim 1 , wherein, in the (d) process, no first conducting layer is formed above the second sacrificial pattern.
4. A manufacturing method for a semiconductor device according to claim 1 , wherein among the cavities, a first cavity formed by etching the first sacrificial pattern forms a sensor cell and, a second cavity formed by etching the second sacrificial pattern is a cavity that does not function as a sensor.
5. A manufacturing method for a semiconductor device according to claim 1 , wherein in the (g) process, the etched state of the second sacrificial pattern on the first region is observed by utilizing an optical microscope.