Semiconductor memory device and method of manufacturing the same
View Patent ↗An improved semiconductor memory device having a silicon on insulator (SOI) structure. Exemplary devices provide improved charge injection into the device's floating gate electrode. Exemplary devices may include a semiconductor substrate including a transistor forming region and a capacitor forming region; a MOSFET; a MOS capacitor; a projection formed within a periphery of the capacitor electrode of the MOS capacitor; and a floating gate electrode extending from the channel region of the MOSFET to overlap the projection of the capacitor electrode, with a gate insulating film interposed therebetween. The projection may include an inclined surface which may have a concave shape and/or the projection may extend above a capacitor groove having a undercut portion beneath the projection.
1. A semiconductor memory device including a memory element including a MOSFET and a MOS capacitor comprising:
a semiconductor substrate including a support substrate, an insulating layer formed over the support substrate, and a semiconductor layer formed over the insulating layer;
an element isolation layer between the transistor forming region and the capacitor forming region;
a projection provided within a periphery of the capacitor forming region of the semiconductor layer;
a capacitor groove provided in the insulating layer;
a gate insulating film over the semiconductor layer, over the element isolation layer, and within the capacitor groove;
a floating gate electrode over the gate insulating film, the floating gate electrode dividing the semiconductor layer at an end portion of the transistor forming region, overlapping a doped region of the MOSFET, and overlapping the projection of the semiconductor layer of the capacitor forming region;
a source and a drain of the MOSFET; and
a capacitor electrode of the MOS capacitor;
wherein the capacitor groove includes an undercut portion below the projection.
2. The semiconductor memory device of claim 1 , wherein the projection includes an inclined surface.
3. The semiconductor memory device of claim 1 , wherein the inclined surface of the projection substantially entirely overlaps the capacitor groove.