IP Library Granted Patent US 8,450,795
Granted Patent B2
US 8,450,795 · App. 12/171,734 · Granted May 28, 2013

Technique for forming the deep doped columns in superjunction

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Quick Facts
Patent No.
US 8,450,795
App. No.
12/171,734
Granted
May 28, 2013
Kind
B2
Abstract

A method of manufacturing a semiconductor device is disclosed and starts with a semiconductor substrate having a heavily doped N region at the bottom main surface and having a lightly doped N region at the top main surface. There are a plurality of trenches in the substrate, with each trench having a first extending portion extending from the top main surface towards the heavily doped region. Each trench has two sidewall surfaces in parallel alignment with each other. A blocking layer is formed on the sidewalls and the bottom of each trench. Then a P type dopant is obliquely implanted into the sidewall surfaces to form P type doped regions. The blocking layer is then removed. The bottom of the trenches is then etched to remove any implanted P type dopants. The implants are diffused and the trenches are filled.

Claims (8)

1. A semiconductor device formed by a method comprising:

providing a semiconductor substrate having first and second main surfaces opposite to each other, the semiconductor substrate having a heavily doped region of a first conductivity type at the second main surface and having a lightly doped region of the first conductivity type at the first main surface side;

providing in the semiconductor substrate a plurality of trenches, with each trench having a first extending portion extending from the first main surface towards the heavily doped region, each trench having a first sidewall surface and a second sidewall surface, at least one of the plurality of trenches being controlled to extend to a first predetermined depth position different from a second depth position of the other of the plurality of trenches, the at least one of the plurality of trenches also having a first length and a first width at least one of which is different from a corresponding second length or second width of the other of the plurality of trenches;

forming a blocking layer on the first and second sidewalls and the bottom of each trench;

ion implanting the first sidewall surface of each trench with a dopant of a second conductivity type to form a first implanted region of the second conductivity type at the first sidewall surface, the first implanted region extending at least partially between the first and second main surfaces of the semiconductor substrate and not beyond the bottom surface of the respective trench;

ion implanting the second sidewall surface of each trench with a dopant of the second conductivity type to form a second implanted region of the second conductivity type at the second sidewall surface, the second implanted region extending at least partially between the first and second main surfaces of the semiconductor substrate and not beyond the bottom surface of the respective trench; and

removing the blocking layer from the first and second sidewalls and bottoms of each trench,

wherein in between each set of adjacent ones of the plurality of trenches a portion of the lightly doped region of the semiconductor substrate is disposed laterally between the respective first and second implanted regions of the adjacent trenches.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 13, 2017
From: MICHAEL W. SHORE
To: ICEMOS TECHNOLOGY LTD
Reel/Frame 042696/0241 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2010
From: THIRD DIMENSION SEMICONDUCTOR, INC.
To: SHORE, MICHAEL W.
Reel/Frame 024727/0991 →