Thin film transistor for driving gate line and liquid crystal display having the same
View Patent ↗A thin film transistor for driving a gate line and a liquid crystal display having the same are provided. The thin film transistor for driving a gate line includes a gate electrode, a semiconductor layer formed on the gate electrode, a drain electrode formed on the semiconductor layer, a source electrode formed on the semiconductor layer and separated from the drain electrode and being coupled to the gate line, and a ripple-prevention electrode formed on the drain electrode which overlaps at least a part of the drain electrode.
1. A thin film transistor for driving a gate line, comprising:
a gate electrode;
a semiconductor layer formed on the gate electrode;
a drain electrode formed on the semiconductor layer;
a source electrode formed on the semiconductor layer and separated from the drain electrode and being coupled to the gate line; and
a ripple-prevention electrode formed on the drain electrode which overlaps at least a part of the drain electrode.
2. The thin film transistor of claim 1 , wherein the drain electrode and the ripple-prevention electrode form a capacitor.
3. The thin film transistor of claim 1 , wherein the ripple-prevention electrode comprises:
a first overlap region which overlaps the drain electrode; and
a second overlap region which overlaps at least a part of the gate electrode without overlapping the drain electrode.
4. The thin film transistor of claim 3 , wherein the first and second overlap regions do not overlap the source electrode.
5. The thin film transistor of claim 1 , wherein the ripple-prevention electrode is made of a transparent conductive material.
6. The thin film transistor of claim 1 , wherein a direct current voltage is applied to the ripple-prevention electrode.
7. The thin film transistor of claim 1 , wherein the semiconductor layer is made of amorphous silicon.
8. A liquid crystal display comprising:
a plurality of gate lines; and
a plurality of thin film transistors coupled to the respective gate lines to output a plurality of gate signals, each of the thin film transistors comprising;
a gate electrode;
a semiconductor layer formed on the gate electrode;
a drain electrode formed on the semiconductor layer;
a source electrode formed on the semiconductor layer and separated from the drain electrode, the source electrode being coupled to the respective gate lines to output the gate signals; and
a ripple-prevention electrode formed on the drain electrode which overlaps at least a part of the drain electrode.
9. The liquid crystal display of claim 8 , wherein the drain electrode and the ripple-prevention electrode form a capacitor.
10. The liquid crystal display of claim 8 , wherein the ripple-prevention electrode comprises:
a first overlap region which overlaps the drain electrode; and
a second overlap region which overlaps at least a part of the gate electrode without overlapping the drain electrode.
11. The liquid crystal display of claim 10 , wherein the first and second overlap regions do not overlap the source electrode.
12. The liquid crystal display of claim 8 , wherein the ripple-prevention electrode is made of a transparent conductive material.
13. The liquid crystal display of claim 8 , further comprising:
a plurality of data lines; and
a plurality of pixel electrodes coupled to the gate lines and the data lines.
14. The liquid crystal display of claim 13 , wherein the ripple-prevention electrode and the pixel electrode are made of a transparent conductive material and are formed on a same layer.
15. The liquid crystal display of claim 13 , further comprising:
a storage electrode which overlaps at least a part of the pixel electrode;
wherein the ripple-prevention electrode is coupled to the storage electrode.
16. The liquid crystal display of claim 15 , wherein a common voltage is applied to the ripple-prevention electrode and the storage electrode.
17. The liquid crystal display of claim 13 , further comprising:
a common voltage line which applies a common voltage;
a storage electrode which overlaps at least a part of the pixel electrode;
a protection layer formed on the common voltage line and the storage electrode, and comprising a first contact hole which exposes a part of the common voltage line and a second contact hole which exposes a part of the storage electrode; and
a ripple-prevention contact unit which extends from the ripple-prevention electrode to electrically connect the common voltage line to the storage electrode through the first and second contact holes, and transfer the common voltage to the ripple-prevention electrode.
18. The liquid crystal display of claim 17 , wherein the storage electrode, the gate electrode, and the gate line are formed on a same layer; and the ripple-prevention electrode, the ripple-prevention contact unit, and the pixel electrode are formed on a same layer.
19. The liquid crystal display of claim 8 , wherein the respective thin film transistor receives a clock signal through the drain electrode, and outputs the clock signal of a high level to the source electrode as a gate signal while a voltage of the high level is applied to the gate electrode.
20. The liquid crystal display of claim 8 , wherein the semiconductor layer is made of amorphous silicon.