IP Library Granted Patent US 7,580,494
Granted Patent B2
US 7,580,494 · App. 12/173,005 · Granted Aug 25, 2009

Low wander timing generation and recovery

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Quick Facts
Patent No.
US 7,580,494
App. No.
12/173,005
Granted
Aug 25, 2009
Kind
B2
Abstract

Systems, apparatuses, and methods for low wander timing generation and/or recovery are disclosed here. In one aspect, embodiments of the present disclosure include a communication system for high speed communications between a first location and a second location. The communication system, may include a transmitter module at the first location associated a first clock and/or a receiver module at the second location associated with the second clock.

Claims (44)

1. A communication system for providing communications between a first location and a second location, the communication system comprising:

a transmitter module at the first location associated with a first clock,

the transmitter module comprising a phase detector module operable to generate a one or more data bits to indicate phase offset-between the first clock and a second clock, the first clock to be to be associated with a transmission rate and the second clock to be associated with a network link rate;

wherein the transmitter module further comprises:

a timing generation circuit comprising:

a divider circuit;

a quantizer circuit coupled to the phase detector module; and

a modulus control circuit coupled to the quantizer circuit;

a receiver module at the second location associated with the second clock, the receiver module to be coupled to the transmitter module via a network;

wherein the transmitter module is operable to transmit to the receiver module at least one of a data stream and the one or more data bits to indicate phase offset via the network; and

wherein the receiver module is operable to determine the transmission rate associated with the first clock at the first location based on the one or more data bits to indicate phase offset and the network link rate.

2. The communication system of claim 1 , wherein the first clock and the second clock have a predefined relation, and the phase detector module is operable to generate signals from the first and the second clocks, the signals having a nominal frequency rate rendering phase comparison of the first and the second clocks possible.

3. The communication system of claim 1 , wherein the transmitter module is operable to transmit the one or more data bits to indicate phase offset.

4. The communication system of claim 3 , wherein the phase offset is transmitted in an overhead channel.

5. The communication system of claim 1 , wherein the divider circuit comprises a variable modulus counter.

6. The communication system of claim 1 , wherein the phase detector module comprises one or more D flip-flops.

7. The communication system of claim 6 , further comprising, a register coupled to the one or more D flip-flops.

8. The communication system of claim 1 , wherein the receiver module comprises a timing recovery circuit.

9. The communication system of claim 8 , wherein the timing recovery circuit further comprises a variable modulus counter.

10. The communication system of claim 9 , wherein the timing recovery circuit further comprises a digital loop filter.

11. The communication system of claim 10 , wherein the timing recovery circuit further comprises one or more of a digital-to-analog converter and a voltage controlled oscillator.

12. A communication system for providing communications between a first location and a second location, the communication system comprising:

a transmitter module at the first location associated with a first clock,

the transmitter module comprising a phase detector module operable to generate a one or more data bits to indicate phase offset—between the first clock and a second clock, the first clock to be to be associated with a transmission rate and the second clock to be associated with a network link rate;

wherein the transmitter module further comprises:

a timing generation circuit comprising

a phase accumulator;

a receiver module at the second location associated with the second clock, the receiver module to be coupled to the transmitter module via a network;

wherein the transmitter module is operable to transmit to the receiver module at least one of a data stream and the one or more data bits to indicate phase offset via the network; and

wherein the receiver module is operable to determine the transmission rate associated with the first clock at the first location based on the one or more data bits to indicate phase offset and the network link rate.

13. The communication system of claim 12 , wherein, the receiver module comprises a timing recovery circuit.

14. The communication system of claim 13 , wherein, the timing recovery circuit comprises a variable modulus counter.

15. The communication system of claim 13 , wherein the timing recovery circuit comprises a digital loop filter.

16. The communication system of claim 13 , wherein the timing recovery circuit further comprises, one or more of a digital to analog converter and a voltage controlled oscillator.

17. A communication system for providing communications between a first location and a second location, the communication system comprising:

a transmitter module at the first location associated with a first clock,

the transmitter module comprising a phase detector module operable to generate a one or more data bits to indicate phase offset-between the first clock and a second clock, the first clock to be to be associated with a transmission rate and the second clock to be associated with a network link rate;

wherein the transmitter module further comprises:

a timing generation circuit comprising

a delta-sigma modulator;

a receiver module at the second location associated with the second clock, the receiver module to be coupled to the transmitter module via a network;

wherein the transmitter module is operable to transmit to the receiver module at least one of a data stream and the one or more data bits to indicate phase offset via the network; and

wherein the receiver module is operable to determine the transmission rate associated with the first clock at the first location based on the one or more data bits to indicate phase offset and the network link rate.

18. The communication system of claim 17 , wherein, the receiver module comprises a timing recovery circuit.

Assignments (2)
CHANGE OF NAME Recorded May 29, 2009
From: AI ACQUISITION CORP
To: POSITRON ACCESS SOLUTIONS INC.
Reel/Frame 022746/0524 →
CORRECTIVE ASSIGNMENT TO CORRECT THE SERIAL NO. 12/176005 TO SERIAL NO. 12/173005 PREVIOUSLY RECORDED ON REEL 022732 FRAME 0387. ASSIGNOR(S) HEREBY CONFIRMS THE PATENT ASSIGNMENT. Recorded May 28, 2009
From: AKTINO, INC.
To: AI ACQUISITION CORP
Reel/Frame 022744/0743 →