IP Library Granted Patent US 8,453,015
Granted Patent B2
US 8,453,015 · App. 12/174,194 · Granted May 28, 2013

Memory allocation for crash dump

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Quick Facts
Patent No.
US 8,453,015
App. No.
12/174,194
Granted
May 28, 2013
Kind
B2
Abstract

A method and module for performing a crash dump in a data processing apparatus in which memory for running the crash dump routine is allocated at the time of the crash. The method comprises running a first routine to identify memory locations of data for use by a second routine; allocating memory for performing the second routine from a memory range that does not contain the identified memory locations; and running the second routine using the allocated memory, wherein the first routine comprises a dummy crash dump routine and the second routine comprises a crash dump routine. The dummy crash dump may use smaller data sizes and does not perform any input or output to non-volatile storage of the data to be dumped. When a memory range that is safe to be reused has been identified, the data stored therein can be dumped and then memory for performing the actual crash dump routine can be allocated from the memory range and be reused for performing the actual crash dump routine.

Claims (53)

1. A method of performing a crash dump of a memory in a data processing apparatus, the method comprising:

running, by a processing unit within a hardware level, a first routine to generate a list of memory locations of the memory having data structures required for performing the crash dump;

running, by the processing unit, a second routine, wherein the second routine includes:

identifying a memory range of the memory that does not contain the listed memory locations;

dumping data from a first portion of the identified memory range to a storage device;

allocating memory locations from the first portion of the identified memory range as a buffer; and

dumping, via the buffer, data from a remaining portion of the identified memory range to the storage device.

2. A method according to claim 1 , wherein the first routine uses smaller data sizes than the second routine.

3. A method according to claim 1 , wherein the running of the first routine is triggered by a kernel crash.

4. A method according to claim 1 , wherein the data processing apparatus comprises a virtual memory management system, and wherein the first routine comprises creating a record of physical page addresses corresponding to virtual page addresses accessed by the first routine.

5. A method according to claim 4 ,

wherein running the first routine further comprises invoking a page fault handler when a virtual page address is accessed, and

wherein creating a record of the physical page addresses corresponding to the virtual page addresses is carried out by the page fault handler.

6. A method according to claim 5 , further comprising marking all translations in a page table of the data processing apparatus as invalid to invoke the page fault handler during the first routine.

7. A method according to claim 1 , wherein allocating memory as a buffer comprises allocating memory to be used for at least one compression buffer.

8. A method according to claim 1 , wherein allocating memory as a buffer comprises allocating a plurality of buffers to be used for performing parallel input/output (I/O).

9. A method according to claim 1 , wherein running the second routine comprises running at least one of compression algorithms, parallel input/output (I/O) operation algorithms, encryption algorithms, and algorithms to write to non-volatile storage over a network.

10. The method according to claim 1 , wherein the identifying of a memory range that does not contain the listed memory locations further comprises:

identifying a highest physical memory page used for kernel static data and text segments; and

searching above the identified highest physical memory page for a largest memory range that does not include any of the listed memory locations.

11. A module for performing a crash dump of memory in a data processing apparatus, comprising:

a processing unit within a hardware level, the processing unit to run a first routine followed by a second routine,

wherein the first routine is to generate a list of memory locations of the memory having data structures required to perform a second routine; and

wherein the second routine is to:

identify a memory range of the memory that does not contain the listed memory locations;

perform a first data dump to dump data stored in the identified memory range to a storage device;

allocate memory locations from the identified memory range as a buffer; and

perform a second data dump to dump data, from the memory not previously dumped, to the storage device via the buffer.

12. A module according to claim 11 , wherein the processing unit is to run the first routine using smaller data sizes than the second routine.

13. A module according to claim 11 ,

wherein the processing unit is to access the memory of the data processing apparatus using virtual memory addresses, and

wherein the module further comprises an internal memory to save physical addresses corresponding to virtual addresses accessed during the first routine.

14. A module according to claim 11 , further comprising a page fault handler to save physical addresses corresponding to virtual addresses accessed by the first routine.

15. A module according to claim 14 , wherein said processing unit is to mark all translations in a page table of the data processing apparatus as invalid to invoke the page fault handler during the first routine.

16. A module according to claim 11 , wherein said processing unit is to dump data in the identified memory range to non-volatile storage prior to allocating memory from the identified memory range as the buffer.

17. A module according to claim 11 , constituting a kernel.

18. The module according to claim 11 , wherein to identify a memory range that does not contain the listed memory locations, the second routine is to:

identify a highest physical memory page used for kernel static data and text segments; and

search above the identified highest physical memory page for a largest memory range that does not include any of the listed memory locations.

19. An apparatus comprising:

a processing unit within a hardware level;

a memory;

a kernel executed by the processing unit;

a memory allocator executed by the processing unit to allocate a first portion of said memory to be used for a crash dump of a second portion of said memory when the kernel crashes; and

a crash dump module implemented by the processing unit to save said second portion of the memory to non-volatile storage when the kernel crashes, the crash dump module to:

identify kernel data structures in the memory when the kernel crashes;

identify the first portion of the memory as a memory range that does not include the identified kernel data structures;

perform a data dump from the first portion of the memory to the non-volatile storage;

cause the memory allocator to allocate the first portion of the memory as a buffer; and

perform a data dump from the second portion of the memory to the non-volatile storage via the buffer.

20. The apparatus according to claim 19 , wherein to identify a memory range that does not contain the listed memory locations, the crash dump module is to:

identify a highest physical memory page used for kernel static data and text segments; and

search above the identified highest physical memory page for a largest memory range that does not include any of the listed memory locations.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 22, 2021
From: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP; HEWLETT PACKARD ENTERPRISE COMPANY
To: VALTRUS INNOVATIONS LIMITED
Reel/Frame 055360/0424 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2015
From: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
To: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Reel/Frame 037079/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 5, 2008
From: PONNUSWAMY, BASKER
To: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Reel/Frame 021351/0962 →