Multiplexing aware sigma-delta analag-to-digital converter

1. An electronic device for analog-to-digital conversion comprising:

a sigma-delta modulator (SDMOD);

a digital filter (FIL) for digital post processing of the output signal of the sigma-delta modulator (SDMOD), said digital filter including registers storing content representing the internal state relating to a specific input signal;

a multiplexer (MUX) for switching the input (INSD) of the sigma-delta modulator (SDMOD) between a first input signal (IN 1 ) and a second input signal (IN 2 );

a memory (MEM) adapted to hold the register content of said digital filter (FIL) relating to said first input signal while said second input signal (IN 2 ) is processed in said digital filter and to hold the register content of said digital filter (FIL) relating to said second input signal while said first input signal (IN 2 ) is processed in said digital filter; and

a controller (CNTL) operable to retrieve the register contents relating to said first input signal from said memory (MEM) when said digital filter (FIL) resumes processing of said first input signal (IN 1 ) and to retrieve the register contents relating to the second input signal from said memory (MEM) when said digital filter (FIL) resumes processing of said second input signal (IN 2 ).

2. The electronic device according to claim 1 , wherein:

said digital filter (FIL) is only activated after a settling time for the sigma-delta modulator (SDMOD).

3. A method for analog-to-digital conversion comprising the steps of:

selecting as an analog input (INSD) either a first analog input signal (IN 1 ) or second analog input signal (IN 2 );

processing said selected analog input signal (INSD) with a sigma-delta modulator (SDMOD);

processing an output signal (OUTMOD) of the sigma-delta modulator (SDMOD) with a first digital filter function upon selection of said first analog input signal; and

processing an output signal (OUTMOD) of the sigma-delta modulator (SDMOD) with a second digital filter function upon selection of said second analog input signal.

4. The method according to claim 3 , wherein:

said step of processing an output signal (OUTMOD) of the sigma-delta modulator (SDMOD) with a first digital filter function employs a first digital filter (FIL 1 ); and

said step of processing an output signal (OUTMOD) of the sigma-delta modulator (SDMOD) with a second digital filter function employs a second digital filter (FIL 1 ).

5. The method according to claim 4 , wherein:

said step of processing an output signal (OUTMOD) of the sigma-delta modulator (SDMOD) with a first digital filter function employs a digital filter (FIL) loaded with a first set of coefficients and/or internal register contents; and

said step of processing an output signal (OUTMOD) of the sigma-delta modulator (SDMOD) with a second digital filter function employs said digital filter (FIL) loaded with a second set of coefficients and/or internal register contents.

6. An electronic device for analog-to-digital conversion comprising:

a sigma-delta modulator (SDMOD);

a first digital filter (FIL 1 ) for digital post processing of an output signal (OUTMOD) of said sigma-delta modulator (SDMOD);

a second digital filter (FIL 2 ) for digital post processing of said output signal (OUTMOD) of said sigma-delta modulator (SDMOD);

a multiplexer (MUX) for switching and input (INSD) of said sigma-delta modulator (SDMOD) between a first input signal (IN 1 ) and a second input signal (IN 2 ); and

a controller (CNTL) connecter to said first digital filter (FIL 1 ), said second digital filter (FIL 2 ) and said multiplexer (MUX) operative to alternately cause

said multiplexer (MUX) to select said first input signal (IN 1 ) and activate said first digital filter (FIL 1 ), and

said multiplexer (MUX) to select said second input signal (IN 2 ) and activate said second digital filter (FIL 2 ).

7. The electronic device according to claim 6 , wherein:

said controller (CNTL) is further operative to activate a corresponding one of either said first digital filter (FIL 1 ) or said second digital filter (FIL 2 ) only after a predetermined settling time for said sigma-delta modulator (SDMOD).