Method for reducing noise coupling in high speed digital systems

1. A printed circuit board fabrication method, comprising:

etching a plurality of high speed signal traces onto a core insulating layer;

forming trenches on respective sides of the plurality of high speed signal traces, thereby removing insulating material adjacent to the plurality of high speed signal traces and forming raised regions having remaining insulating material, the plurality of high speed signal traces disposed on and coupled to the remaining insulating material;

coupling pre-preg material on the high speed signal traces;

removing the pre-preg material adjacent the trenches, thereby retaining the pre-preg material aligned with the high speed signal traces, wherein a width of a trench portion disposed in the pre-preg material is greater than a width of a trench portion disposed in the core insulating layer; and

heating and pressing a core layer to the pre-preg layer, and heating and pressing the pre-preg layer to the core insulating layer,

wherein the plurality of high-speed signal traces disposed on an upper surface of the core insulating layer, each of the plurality of high speed signal traces disposed on a pedestal defined by a section of the pre-preg layer and the raised regions of the core insulating layer, each pedestal being separated by an air gap disposed between adjacent pedestals.

2. The method as claimed in claim 1 wherein the plurality of high speed signal traces are single layer nets, wherein each pedestal supports a single layer net.

3. The method as claimed in claim 1 wherein the plurality of high speed signal traces are differential nets, wherein each pedestal supports a differential net pair.