IP Library Granted Patent US 7,687,405
Granted Patent B2
US 7,687,405 · App. 12/177,456 · Granted Mar 30, 2010

High resolution patterning of surface energy utilizing high resolution monomolecular resist for fabrication of patterned media masters

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Quick Facts
Patent No.
US 7,687,405
App. No.
12/177,456
Granted
Mar 30, 2010
Kind
B2
Abstract

A method for patterning and forming very small structures on a substrate such as a wafer. The process uses a difference in surface energy between a mask and the substrate to selectively deposit a hard mask material such as a metal onto the surface of the substrate. The mask can be formed extremely thin, such as only an atomic mono-layer thick, and can be patterned by ion beam photolithography. The pattern can, therefore, be formed with extremely high resolution. The thin mask layer can be constructed of various materials and can be constructed of perfluoropolyether diacrylate (PDA), which can be dip coated to and exposed to form a desirable positive photoresist mask layer.

Claims (48)

1. A method for forming very small structures on a wafer, the method comprising:

providing a substrate having a first surface energy;

depositing a thin mask layer over the substrate, the thin mask layer having a second surface energy that is different from the first surface energy;

photolithographically patterning and developing the thin mask layer to remove selected portions of the thin mask layer from the substrate while leaving other portions of the substrate covered with the thin mask layer; and

depositing a hard mask material onto the substrate such that the hard mask material adheres to uncovered portions of the substrate and not to covered portions of the substrate based on the difference between the first and second surface energies; and

after depositing the hard mask, removing the remaining thin mask layer, and then performing a material removal process to remove portions of the substrate that are not covered by the hard mask layer.

2. A method as in claim 1 further comprising after depositing the hard mask, removing the remaining thin mask material layer.

3. A method as in claim 1 wherein the hard mask is a metal.

4. A method as in claim 1 wherein the depositing a hard mask comprises electroless plating of a metal.

5. A method as in claim 1 wherein the depositing a hard mask comprises electroless deposition of Cu.

6. A method as in claim 1 wherein the thin mask layer is a monomolecular mask layer.

7. A method as in claim 1 wherein the thin mask layer has a thickness not greater than 1 nm.

8. A method as in claim 1 , wherein the thin mask layer comprises perfluoropolyether diacrylate.

9. A method as in claim 1 further comprising after depositing the hard mask, removing the remaining thin mask layer and then using the substrate as a nanoimprinting master to form a pattern on a workpiece.

10. A method as in claim 1 further comprising after depositing the hard mask, removing the remaining thin mask layer and pressing the substrate against a workpiece to form a pattern on the workpiece.

11. A method as in claim 1 further comprising, after;

performing a material removal process to remove portions of the substrate that are not protected by the hard mask layer,

using the wafer as a nanoimprinting master to form a pattern on a workpiece.

12. A method as in claim 1 further comprising, after

performing a material removal process to remove portions of the substrate that are not protected by the hard mask layer,

pressing the substrate against a workpiece to form a pattern on the workpiece.

13. A method as in claim 1 further comprising, after removing the bard mask; and

using the substrate as a nanoimprinting master to form a pattern on a workpiece.

14. A method as in claim 1 further comprising using a reactive ion etching to remove the portions of the substrate that are not covered by the hard mask layer.

15. A method as in claim 1 further comprising patterning the thin mask structure using an electron beam tool.

16. A method as in claim 1 , wherein the thin mask layer is deposited by self-assembly.

17. A method as in claim 1 wherein the thin mask layer is deposited by spin coating.

18. A method as in claim 1 wherein the thin mask layer is deposited by dip-coating.

19. A method of forming small structures on a substrate, comprising:

providing a substrate, the substrate having a surface energy;

forming a pattern layer on the substrate, the pattern including regions having a surface energy that is different than that of the substrate;

depositing a material to adhere to selected portions of the substrate based on the surface energy difference;

removing the pattern layer; and

performing a material removal process to remove portions of the substrate that are not covered by the deposited material.

20. A method for forming structures on a substrate, comprising: providing a substrate, the substrate having a first surface energy;

forming mask structure over the substrate, the mask structure having a second surface energy that is different from the first surface energy, the mask structure further having one or more openings defining a pattern;

depositing a material to preferentially adhere to the substrate through the one or more openings in the pattern, the preferential adhesion being due to the difference in surface energy between the mask structure and the substrate;

removing the mask structure; and

performing a material removal process to remove portions of the substrate that rae not protected by the deposited material.

21. A method of patterning a wafer, comprising:

providing a substrate;

depositing a layer of perfluoropolyether diacrylate (PDA);

photolithographically exposing the PDA layer; and

developing the PDA layer to form a PDA mask that leaves portions of the substrate uncovered;

depositing a hard mask layer that adheres to the substrate but not to the PDA mask;

removing the PDA mask, and

performing a material removal process to remove portions of the hard mask that are not protected by the hard mask layer.

22. A method as in claim 21 wherein the photolithographic exposure comprises electron beam photolithography.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2016
From: HGST NETHERLANDS B.V.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 040826/0821 →
CHANGE OF NAME Recorded Oct 25, 2012
From: HITACHI GLOBAL STORAGE TECHNOLOGIES NETHERLANDS B.V.
To: HGST NETHERLANDS B.V.
Reel/Frame 029341/0777 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 25, 2008
From: BANDIC, ZVONIMIR Z.; KNIGGE, BERNARD E.; MATE, CHARLES MATHEW
To: HITACHI GLOBAL STORAGE TECHNOLOGIES NETHERLANDS B.V.
Reel/Frame 021435/0905 →