Semiconductor system-in-package and method for making the same
View Patent ↗Semiconductor devices that contain a system in package and methods for making such packages are described. The semiconductor device with a system in package (SIP) contains a first IC die, passive components, and discrete devices that are contained in a lower level of the package. The SIP also contains a second IC die that is vertically separated from the first IC die by an array of metal interposers, thereby isolating the components of the first IC die from the components of the second IC die. Such a configuration provides more functionality within a single semiconductor package while also reducing or eliminating local heating in the package. Other embodiments are also described.
1. A method for making semiconductor package, comprising:
providing a substrate containing multiple land pads;
connecting a first IC die to a first portion of the lands pads;
connecting a passive component and a discrete device to a second portion of the land pads;
connecting an array of connectors to a third portion of the land pads;
providing a second IC die over the first IC die;
connecting the second IC die to the array of connectors without contacting the second IC die to the first IC die, wherein the second IC die is supported by the connectors; and
removing the substrate.
2. The method of claim 1 , wherein the connectors contain a first portion extending away from the third portion of the land pads and a second portion extending towards the second IC die.
3. The method of claim 1 , further comprising connecting the first IC die to the first portion of the land pads using a bumping process and connecting the second die to the connectors using a bumping process.
4. The method of claim 1 , further comprising encapsulating a molding material around the connectors and the first and second dies.
5. A method for making a semiconductor system in a package, comprising:
providing a substrate;
forming multiple land pads on the substrate by a deposition and etch procedure;
connecting a first die to a first inner portion of the land pads;
connecting a passive component and a discrete device connected to a second, inner portion of the land pads;
connecting an array of connectors to a third portion of the land pads located around the periphery of the substrate, the connectors containing a first portion extending away from the third portion of the land pads and a second portion extending towards the middle of the substrate;
providing a second die over the first die;
connecting the second die to the array of connectors, wherein the second die rests on and is supported by the connectors without contacting the first die;
encapsulating a molding material around the connectors and the first and second dies without underfilling; and
removing the substrate.
6. The method of claim 5 , further comprising connecting the first die to the first portion of the land pads using a bumping process and connecting the second die to the connectors using a bumping process.
7. The method of claim 5 , further comprising connecting the first die to the first portion of the land pads using a wirebonding process and connecting the second die to the connectors using a wirebonding process.
8. A method for making semiconductor package, comprising:
providing a substrate containing multiple land pads;
connecting a first IC die to a first portion of the lands pads using a wirebonding process;
connecting a passive component and a discrete device to a second portion of the land pads;
connecting an array of connectors to a third portion of the land pads using a wirebonding process;
providing a second IC die over the first IC die;
connecting the second IC die to the array of connectors without contacting the second IC die to the first IC die, wherein the second IC die is supported by the connectors; and
removing the substrate.
9. The method of claim 1 , wherein the second portion of the land pads is located between the first portion and the third portion of the land pads.
10. The method of claim 9 , wherein the first portion of the land pads is located on a central region of the substrate and the third portion of the land pads is located on a periphery of the substrate.
11. The method of claim 1 , further comprising connecting the first die to the first portion of the land pads using a wirebonding process and connecting the second die to the connectors using a wirebonding process.
12. The method of claim 1 , wherein the second die is isolated from the first die.
13. The method of claim 1 , wherein the multiple land pads operate as external leads for the package.
14. The method of claim 4 , wherein the encapsulation is performed without underfilling.
15. The method of claim 5 , wherein the second portion of the land pads is located between the first portion and the third portion of the land pads.
16. The method of claim 15 , wherein the first portion of the land pads is located on a central region of the substrate and the third portion of the land pads is located on a periphery of the substrate.
17. The method of claim 5 , wherein the second die is isolated from the first die.
18. The method of claim 5 , wherein the multiple land pads operate as external leads for the package.
19. The method of claim 8 , wherein the second portion of the land pads is located between the first portion and the third portion of the land pads.
20. The method of claim 19 , wherein the first portion of the land pads is located on a central region of the substrate and the third portion of the land pads is located on a periphery of the substrate.
21. The method of claim 8 , wherein the second die is isolated from the first die.
22. The method of claim 8 , wherein the multiple land pads operate as external leads for the package.
23. The method of claim 8 , wherein the package contains multiple passive components.
24. The method of claim 8 , wherein the package contains multiple discrete devices.