System-in-package and method of testing thereof
View Patent ↗A method of testing a SIP that has a CPU, a nonvolatile memory and a volatile memory. First, the CPU is used to test the memories. Then the CPU is tested separately. Preferably, the programs for testing the memories are pre-stored in and loaded from the nonvolatile memory into the volatile memory and are executed by the CPU in the volatile memory. Preferably, the test results are stored in the nonvolatile memory.
1. A method of assembling and testing a system-in-package, comprising the steps of:
(a) fabricating a nonvolatile memory on a first chip;
(b) fabricating a volatile memory on a second chip that is physically independent of said first chip;
(c) fabricating a single CPU on a third chip that is physically independent of said first and second chips;
(d) packaging said nonvolatile memory, said volatile memory and said CPU together in a common package, with said nonvolatile memory, said volatile memory and said CPU operationally connected to each other, wherein said CPU is a sole said CPU in said common package;
(e) testing said volatile memory by using the CPU to execute a first testing program; and
(f) storing results of said executing in said nonvolatile memory.
2. The method of claim 1 , further comprising the steps of:
(g) executing a second testing program in order to test said nonvolatile memory; and
(h) storing results of said executing of said second testing program in said nonvolatile memory.
3. The method of claim 1 , wherein said executing is effected during a burn-in of the volatile memory.